Digital Systems Laboratory - Eskişehir Osmangazi Üniversitesi

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Fig. 21 7485 4-bit magnitude comparator.f. Construct the magnitude comparator of Fig. 22. The design of the logic circuit is described in PreLabQ2. Check the comparator action using part (e).Fig. 22 A magnitude comparator using a subtractor.24
Digital Systems Laboratory 2011Lab 7 : Design with MultiplexersObjectives• To design a combinational circuit and implement it with multiplexers.• To use a demultiplexer to implement a multiple output combinational circuit from the same inputvariables.Apparatus7404 HEX inverter74151 8x1 multiplexer74153 dual 4x1 multiplexer (x2)7447 BCD-to-Seven-Segment decoderSeven-Segment DisplayLogicWorks or Proteus can be used in the digital circuit simulations.PreLab Questions:Design the circuits described in Part 1 and Part 2.IC Description:74151 is a 8 line-to-1 line multiplexer. It has the schematic representation shown in Fig 23. Selection linesS2, S1 and S0 select the particular input to be multiplexed and applied to the output. Strobe S acts as anenable signal. If strobe =1, the chip 74151 is disabled and output y = 0. If strobe = 0 then the chip 74151is enabled and functions as a multiplexer. Table 10 shows the multiplex function of 74151 in terms ofselect lines.Table 10Strobe Select OutputLinesS S2 S1 S0 Y1 X X X 00 0 0 0 D00 0 0 1 D10 0 1 0 D20 0 1 1 D30 1 0 0 D40 1 0 1 D50 1 1 0 D60 1 1 1 D7Fig. 23 IC type 74151 Multiplexer 8 ×174153 is a dual 4 line-to-1 line multiplexer. It has the schematic representation shown in Fig 24. Selectionlines S1 and S0 select the particular input to be multiplexed and applied to the output IY{1 = 1, 2}.25
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Digital Systems Laboratory 2011Lab
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