MCP3550/1/3 - Microchip

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MCP3550/1/34.4 Differential Analog InputsThe MCP3550/1/3 devices accept a fully differentialanalog input voltage to be connected to the V IN+ andV IN- input pins. The differential voltage that is convertedis defined by V IN = V IN + – V IN -. The differential voltagerange specified for ensured accuracy is from -V REF to+V REF .The converter will output valid and usable codes from-112% to 112% of output range (see Section 5.0“Serial Interface”) at room temperature. The ±12%overrange is clearly specified by two overload bits inthe output code: OVH and OVL. This feature allows forsystem calibration of a positive gain error.The absolute voltage range on these input pins extendsfrom V SS - 0.3V to V DD + 0.3V. If the input voltages areabove or below this range, the leakage currents of theESD diodes will increase exponentially, degrading theaccuracy and noise performance of the converter. Thecommon mode of the analog inputs should be chosensuch that both the differential analog input range andabsolute voltage range on each pin are within thespecified operating range defined in Section 1.0“Electrical Characteristics”.Both the analog differential inputs and the referenceinput have switched-capacitor input structures. Theinput capacitors are charged and dischargedalternatively with the input and the reference in order toprocess a conversion. The charge and discharge of theinput capacitors create dynamic input currents at theV IN + and V IN - input pins inversely proportional to thesampling capacitor. This current is a function of thedifferential input voltages and their respective commonmodes. The typical value of the differential inputimpedance is 2.4 MΩ, with V CM = 2.5V, V DD = V REF =5V. The DC leakage current caused by the ESD inputdiodes, even though on the order of 1 nA, can causeadditional offset errors proportional to the sourceresistance at the V IN + and V IN - input pins.From a transient response standpoint and as a firstorderapproximation, these input structures form asimple RC filtering circuit with the source impedance inseries with the R ON (switched resistance when closed)of the input switch and the sampling capacitor. In orderto ensure the accuracy of the sampled charge, propersettling time of the input circuit has to be considered.Slow settling of the input circuit will create additionalgain error. As a rule of thumb, in order to obtain 1 ppmabsolute measurement accuracy, the sampling periodmust be 14 times greater than the input circuit RC timeconstant.4.5 Voltage Reference Input PinThe MCP3550/1/3 devices accept a single-endedexternal reference voltage, to be connected on theV REF input pin. Internally, the reference voltage for theADC is a differential voltage with the non-inverting inputconnected to the V REF pin and the inverting inputconnected to the V SS pin. The value of the referencevoltage is V REF - V SS and the common mode of thereference is always (V REF - V SS )/2.The MCP3550/1/3 devices accept a single-endedreference voltage from 0.1V to V DD. The converteroutput noise is dominated by thermal noise that isindependent of the reference voltage. Therefore, theoutput noise is not significantly improved by loweringthe reference voltage at the V REF input pin. However, areduced reference voltage will significantly improve theINL performance since the INL max error is2proportional to V REF (see Figure 2-4).The charge and discharge of the input capacitor createdynamic input currents at the V REF input pin inverselyproportional to the sampling capacitor, which is a functionof the input reference voltage. The typical value ofthe single-ended input impedance is 2.4 MΩ, withV DD =V REF = 5V. The DC leakage current caused bythe ESD input diodes, though on the order of 1 nAtypically, can cause additional gain error proportional tothe source resistance at the V REF pin.4.6 Power-On Reset (POR)The MCP3550/1/3 devices contain an internal Power-On Reset (POR) circuit that monitors power supplyvoltage V DD during operation. This circuit ensurescorrect device start-up at system power-up and powerdownevents. The POR has built-in hysteresis and atimer to give a high degree of immunity to potentialripple and noise on the power supplies, as well as toallow proper settling of the power supply during powerup.A 0.1 µF decoupling capacitor should be mountedas close as possible to the V DD pin, providing additionaltransient immunity.The threshold voltage is set at 2.2V, with a tolerance ofapproximately ±5%. If the supply voltage falls belowthis threshold, the MCP3550/1/3 devices will be held ina reset condition or in Shutdown mode. When the partis in Shutdown mode, the power consumption is lessthan 1 µA. The typical hysteresis value is around200 mV in order to prevent reset during brown-out orother glitches on the power supply.DS21950E-page 18© 2009 Microchip Technology Inc.
MCP3550/1/3Once a power-up event has occurred, the device mustrequire additional time before a conversion can takeplace. During this time, all internal analog circuitry mustsettle before the first conversion can occur. An internaltimer counts 32 internal clock periods before theinternal oscillator can provide clock to the conversionprocess. This allows all internal analog circuitry tosettle to their proper operating point. This timing istypically less than 300 µs, which is negligible comparedto one conversion time (e.g. 72.7 ms for theMCP3551). Figure 4-6 illustrates the conditions for apower-up and power-down event under typical start-upconditions.4.8 Sleep ModeDuring Sleep mode, the device is not converting and isawaiting data retrieval; the internal analog circuitry isstill running and the device typically consumes 10 µA.In order to restart a conversion while in Sleep mode,toggling CS to a logic-high (placing the part in Shutdownmode) and then back to a logic-low will restart theconversion. Sleep can only be entered in SingleConversion mode. Once a conversion is complete inSingle Conversion mode, the device automaticallyenters Sleep mode.V DD2.2V2.0V300 µs0VResetStart-upNormalOperationResetTimeFIGURE 4-6:Power-On Reset Operation.4.7 Shutdown ModeWhen not internally converting, the two modes ofoperation for the MCP3550/1/3 devices are theShutdown and Sleep modes. During Shutdown mode,all internal analog circuitry, including the POR, is turnedoff and the device consumes less than 1 µA. Whenexiting Shutdown mode, the device must requireadditional time before a conversion can take place.During this time, all internal analog circuitry must settlebefore the first conversion can occur. An internal timercounts 32 internal clock periods before the internaloscillator can provide clock to the conversion process.This allows all internal analog circuitry to settle to theirproper operating point. This timing is typically less than300 µs, which is negligible compared to one conversiontime (72.7 ms for MCP3551).© 2009 Microchip Technology Inc. DS21950E-page 19
Page 7 and 8: MCP3550/1/32.0 TYPICAL PERFORMANCE
Page 9 and 10: MCP3550/1/3Note: Unless otherwise s
Page 11 and 12: MCP3550/1/3Note: Unless otherwise s
Page 13 and 14: MCP3550/1/33.0 PIN DESCRIPTIONSThe
Page 15 and 16: MCP3550/1/34.0 DEVICE OVERVIEWThe M
Page 17: MCP3550/1/3:FIGURE 4-2: SINC Filter
Page 21 and 22: MCP3550/1/35.0 SERIAL INTERFACE5.1
Page 23 and 24: MCP3550/1/35.3 Single Conversion Mo
Page 25 and 26: MCP3550/1/35.5 Using The MCP3550/1/
Page 27 and 28: MCP3550/1/36.0 PACKAGING INFORMATIO
Page 29 and 30: MCP3550/1/3DNeEE1NOTE 11 2 3bhhαAA
Page 31 and 32: MCP3550/1/3APPENDIX A:REVISION HIST
Page 33 and 34: MCP3550/1/3PRODUCT IDENTIFICATION S
Page 35 and 36: Note the following details of the c

MCP3550/1/3 - Microchip

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