Design and Implementation of On-board Electrical Power ... - OUFTI-1

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PrefixX7X5Y5Z5SuffixTemperature range-55 to 125 ◦ C-55 to 85 ◦ C-30 to 85 ◦ C10 to 85 ◦ CRelative variation of capacityD 3.3%E 4.7%F 7.5%P 10%R 15%S 22%T +22%, -33%U +22%, -56%V +22%, -82%Table 5.3: Prefixes and suffixes used by EIA to classify capacitor dielectrics.5.9.4 Rated voltageThe rated voltage of ceramic capacitors is generally given at ambient temperature. At atemperature of 125 ◦ C, the rated voltage can loose 50% of its value. A good caution rule is tochose capacitor with a rated voltage that is twice the voltage they will be submitted to.5.9.5 Bending strengthThe EPS card could bend under the effect of vibrations and accelerations during launch,and under the effect of temperature gradients. Small size high-capacity ceramic capacitorsare sensible to mechanical deformation. Some models are designed to have a better bendingstrength: the automotive and “flexible termination” models. The capacitors of the EPS werechosen among automotive and “flexible termination” models.5.10 Schematics of the EPSThe complete schematics of the engineering model of the EPS card are shown in the AppendixD. They include connectors, jumpers, tests points and the deployment switch (switch whichdisconnects the batteries during launch).90
Chapter 6Prototypes of the EPS6.1 IntroductionThe initial development plan of the subsystems cards of OUFTI-1 included three phasesconcerning the realization and tests of prototypes: the breadboards model, the engineeringmodel, and the flight model.• Phase 1: The breadboards model.The different modules of a subsystem are made on breadboards. This allows to knowthe electrical components and test if the modules work fine independently. Severalprototypes were made during the internship of Philippe Ledent at Thales Alenia Space:one prototype of the first dissipation system, one PCB with the prototypes of the threeDC/DC converters. Two prototypes were made during this work: the prototype of thesecond dissipation system and the prototype of the protection circuit. The breadboardsmodels were tested during the internship of the author. Most important tests and resultsare reported in [1].• Phase 2: The engineering model.The engineering model is an on-scale PCB prototype. It is supposed to be nearlyidentical to flight model but it is only devoted to tests. The engineering model caninclude more test points or jumpers than the flight model. The engineering model ofthe EPS was made during this work. The realization of the engineering model will bedetailed in this chapter. The tests on the engineering model are reported in [1] too.• Phase 3: The flight model.The flight model is the model that will be sent in space. It will be produced next year,when the engineering model is fully validated.6.2 The breadboards modelThis sections presents the prototypes on breadboard made during this work: the seconddissipation system and the protection circuit.91
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AcknowledgementsI want to thank the
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Contents1 Introduction 91.1 Cubesat
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4.4.2 Mean case . . . . . . . . . .
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B Power budget worksheet 106C Pictu
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design and the tests are delegated
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Chapter 2Requirements of the EPS2.1
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• The Single-Event Upset (SEU)Thi
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the P-POD. RBF pins must fit within
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Figure 2.6: Top view of the PC104 c
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Chapter 3Design of EPS architecture
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• Voltage (4) and current (5) at
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Figure 3.6: The equivalent circuit
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of our Lithium-Polymer batteries va
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Figure 3.12: I-V curve of a solar p
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3.3.3 CapacityA important value to
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Parameter SLPB723870H4 SLPB554374HN
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of the batteries is kept between -2
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Over Charge Prohibition 4.275 ± 0.
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supplied in 5V. The circuit will be
Page 40 and 41: Chapter 4The Power Budget4.1 Introd
Page 42 and 43: Figure 4.1: P-V curve of a solar pa
Page 44 and 45: 4.3.2 Efficiency of convertersTo at
Page 46 and 47: Figure 4.3: Consumptions in % in me
Page 48 and 49: Chapter 5Electrical Design of EPS5.
Page 50 and 51: V outV in= D. (5.1)Since D ≤ 1, t
Page 52 and 53: The power losses in the inductor ar
Page 54 and 55: ∆i L,1 + ∆i L,2 = 0, (5.16)V in
Page 56 and 57: Using the value of ∆i L given by
Page 58 and 59: There is no data about the case to
Page 60 and 61: Capacitor selectionFour 10µF ceram
Page 62 and 63: • Output voltage: 5V.• Maximum
Page 64 and 65: Figure 5.12: Burst mode operation (
Page 66 and 67: Figure 5.14: Simplified schematics
Page 68 and 69: Figure 5.15: Worksheet for 3.3V con
Page 70 and 71: sequently, the k was chosen above 0
Page 72 and 73: where G 1 is the initial control-to
Page 74 and 75: Figure 5.21: Measured Bode diagram
Page 76 and 77: Figure 5.26: Equivalence between th
Page 78 and 79: C f =12πf f R 0f,L f = R 2 0f C f
Page 80 and 81: Figure 5.37: Schematics of the firs
Page 82 and 83: R KR >1.45V100mA − 1.3A35= 23.07
Page 84 and 85: The schematics is shown on figure 5
Page 86 and 87: A commercial model meets all requir
Page 88 and 89: Figure 5.45: Schematics of the heat
Page 92 and 93: 6.2.1 The second dissipation system
Page 94 and 95: • The antenna deployment system.
Page 96 and 97: 6.3.3 TestsThe engineering model of
Page 98 and 99: 7.3 ActivitiesAs OUFTI-1 is designe
Page 100 and 101: 8.1.2 DesignA model of Li-Po batter
Page 102 and 103: [15] Fabien Jordan, Phase B Electri
Page 104 and 105: TaK = 273 + TaC;%Photo-current ther
Page 106 and 107: Appendix BPower budget worksheetIn
Page 108 and 109: 108
Page 110 and 111: Appendix CPictures of the prototype
Page 112 and 113: Appendix DSchematics of the enginee
Page 114 and 115: 876543213V3 CONVERTER AND INPUT FIL
Page 116: 87654321ANTENNA DEPLOYMENT CIRCUITB
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