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Design and Implementation of On-board Electrical Power ... - OUFTI-1

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which provides the minimum value for the inductance.To find the largest possible value <strong>of</strong> the RHS <strong>of</strong> Eq. 5.26, we take the derivative <strong>of</strong> thenumerator N = Vin 2 V out − ηVin 3 , i.e. dN= 2V in V out − 3ηVdVin. 2(5.27)inThis givesV in = 2V out3η(5.28)This value <strong>of</strong> V in is used if it is in the range <strong>of</strong> possible V in for the converter. Otherwisethe closed V in within the range <strong>of</strong> possible V in is used.The peak current in the inductor is thus successively given byI max{ }= max I av + ∆i L2I max = max{IoutD ′}+ V inD2Lf s{ }I max = max IoutVoutηV in+ V in(V out−ηV in )2Lf sV out(5.29)(5.30)(5.31)The power losses in the inductor are equal to I 2 avR L , where R L is the series resistance <strong>of</strong>the inductor. They represent a loss <strong>of</strong> 1% efficiency ifR L < 0.01 V outD ′2I out= 0.01D ′2 R. (5.32)We now have all the elements necessary to design the inductor.follows:The procedure is as• The inductance is given by Eq. 5.26, where V in is given by Eq. 5.28 <strong>and</strong> at maximumI out .• The peak current in the inductor is given by Eq. 5.31, with maximum V in <strong>and</strong> maximumI out .• An acceptable inductor series resistance is given by Eq. 5.32.Capacitor designDuring phase 1, dv Cdt= i CC= −IoutC, <strong>and</strong> during phase 2, dv Cdt= i CC= Iav−IoutC.If the slope <strong>of</strong> v C during one phase is known, the voltage ripple on the capacitor ∆v C canbe obtained as follows:55

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