Design and Implementation of On-board Electrical Power ... - OUFTI-1

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V outV in= D. (5.1)Since D ≤ 1, this formula confirms the fact that a buck converter can only lower ormaintan equal the input voltage. This is actually reflected by the name of the converterwhich is related to the verb “to buck”.This formula is true assuming that all components are ideal. In practice, the switch iscomposed of semiconductor devices, i.e. a transistor and a diode, which implies switchinglosses. Furthermore, the inductor and the capacitor have a series resistance. To take lossesinto account, a coefficient is introduced in the formula. This coefficient is the efficiency η ofthe converter,Inductor designV outV in= ηD. (5.2)The three main criteria to choose the inductor are:• The current ripple in the inductor is inversely proportional to the inductance. A goodpractical rule is to keep the ripple below 20% of the maximum inductor DC current.• The saturation current of the inductor must be higher than the inductor peak currentI max .• The equivalent series resistance of the inductor must be low, to avoid power losses.The voltage across the inductor, v L (t), is equal to V s (t) − V out (t). The inductance andthe capacitor form a second-order low-pass filter. This filter attenuates the high frequenciescomponents of V s . If the filter is well designed, the variation of V out can be neglected. Wehave v L (t) = V in − V out when the switch is in position 1, and v L (t) = −V out when it is inposition 2.isThe relation between v L and i L is v L (t) = L di L(t)dt. Thus, the slope of the inductor currentdi L (t)dtdi L (t)dt= V in − V outL= −V outLduring phase 1. (5.3)during phase 2. (5.4)The inductor current is illustrated in Fig. 5.3 (third curve).The maximum current in the inductor, I max is equal to I av , the average current in L plushalf the current ripple ∆i L (peak to peak). The average current I av is equal to the currentI out flowing in the load. We can thus write50
Figure 5.3: Evolution of voltages and currents in a buck converter (from Wikipedia).I max = I out + ∆i L2 , (5.5)where the ripple ∆i L is given by the slope of i L times the phase 1 interval, i.e. DT s . Asa result, we getV in − V out∆i L = DT s . (5.6)LI max = I out + V out(V in − V out ). (5.7)V in 2ηf s LThe literature recommends to have a value of ∆i L which lie in the range of 0.2 to 0.4 I out(with maximum load) [16]. We write the constraint as∆i L < kI out , (5.8)where k ∈ [0.2; 0.4].Using the above equation, we getwhich provides the minimum value for the inductance.L > V out(V in − V out)V in ηkf s I out. (5.9)51
Page 2 and 3: AcknowledgementsI want to thank the
Page 4 and 5: Contents1 Introduction 91.1 Cubesat
Page 6 and 7: 4.4.2 Mean case . . . . . . . . . .
Page 8 and 9: B Power budget worksheet 106C Pictu
Page 10 and 11: design and the tests are delegated
Page 12 and 13: Chapter 2Requirements of the EPS2.1
Page 14 and 15: • The Single-Event Upset (SEU)Thi
Page 16 and 17: the P-POD. RBF pins must fit within
Page 18 and 19: Figure 2.6: Top view of the PC104 c
Page 20 and 21: Chapter 3Design of EPS architecture
Page 22 and 23: • Voltage (4) and current (5) at
Page 24 and 25: Figure 3.6: The equivalent circuit
Page 26 and 27: of our Lithium-Polymer batteries va
Page 28 and 29: Figure 3.12: I-V curve of a solar p
Page 30 and 31: 3.3.3 CapacityA important value to
Page 32 and 33: Parameter SLPB723870H4 SLPB554374HN
Page 34 and 35: of the batteries is kept between -2
Page 36 and 37: Over Charge Prohibition 4.275 ± 0.
Page 38 and 39: supplied in 5V. The circuit will be
Page 40 and 41: Chapter 4The Power Budget4.1 Introd
Page 42 and 43: Figure 4.1: P-V curve of a solar pa
Page 44 and 45: 4.3.2 Efficiency of convertersTo at
Page 46 and 47: Figure 4.3: Consumptions in % in me
Page 48 and 49: Chapter 5Electrical Design of EPS5.
Page 52 and 53: The power losses in the inductor ar
Page 54 and 55: ∆i L,1 + ∆i L,2 = 0, (5.16)V in
Page 56 and 57: Using the value of ∆i L given by
Page 58 and 59: There is no data about the case to
Page 60 and 61: Capacitor selectionFour 10µF ceram
Page 62 and 63: • Output voltage: 5V.• Maximum
Page 64 and 65: Figure 5.12: Burst mode operation (
Page 66 and 67: Figure 5.14: Simplified schematics
Page 68 and 69: Figure 5.15: Worksheet for 3.3V con
Page 70 and 71: sequently, the k was chosen above 0
Page 72 and 73: where G 1 is the initial control-to
Page 74 and 75: Figure 5.21: Measured Bode diagram
Page 76 and 77: Figure 5.26: Equivalence between th
Page 78 and 79: C f =12πf f R 0f,L f = R 2 0f C f
Page 80 and 81: Figure 5.37: Schematics of the firs
Page 82 and 83: R KR >1.45V100mA − 1.3A35= 23.07
Page 84 and 85: The schematics is shown on figure 5
Page 86 and 87: A commercial model meets all requir
Page 88 and 89: Figure 5.45: Schematics of the heat
Page 90 and 91: PrefixX7X5Y5Z5SuffixTemperature ran
Page 92 and 93: 6.2.1 The second dissipation system
Page 94 and 95: • The antenna deployment system.
Page 96 and 97: 6.3.3 TestsThe engineering model of
Page 98 and 99: 7.3 ActivitiesAs OUFTI-1 is designe
Page 100 and 101:
8.1.2 DesignA model of Li-Po batter
Page 102 and 103:
[15] Fabien Jordan, Phase B Electri
Page 104 and 105:
TaK = 273 + TaC;%Photo-current ther
Page 106 and 107:
Appendix BPower budget worksheetIn
Page 108 and 109:
108
Page 110 and 111:
Appendix CPictures of the prototype
Page 112 and 113:
Appendix DSchematics of the enginee
Page 114 and 115:
876543213V3 CONVERTER AND INPUT FIL
Page 116:
87654321ANTENNA DEPLOYMENT CIRCUITB
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