[Instruction] Contents
[Instruction] Contents [Instruction] Contents
Advanced Function InstructionFUN22 PBREAKBREAK FROM FOR AND NEXT LOOP(BREAK)FUN22 PBREAK●●●When execution control〝EN〞=1 or〝EN↑〞( P instruction)changes from 0→1,it will terminate the FORand NEXT program loop。The program within the FOR and NEXT loop will be executed N times (N is assigned by FOR instruction)successively,but if it is necessary to terminate the execution loop less than N times,the BREAK instructionis necessary to apply。The BREAK instruction must be located within the FOR and NEXT program loop。ENRSTV70FORD10EN17.CMPSa : D100Sb : R0Va=ba>bM200a
Advanced Function InstructionFUN 23 PDIV4848-BIT DIVISIONFUN 23 PDIV48Operation controlUnsign/SignENU/SLadder symbol23P.DIV48Sa :Sb :D :D=0 Quotient = 0ERRDivisor = 0Sa:Starting register of dividendSb:Starting register of divisorD : Starting register for storing the divisionresult (quotient)Sa,Sb,can combine V, Z, P0~P9 for indexaddressing.OperandRangeHR OR SR ROR DR XRR0∣R3839R3904∣R3967R3968∣R4167R5000∣R8071D0∣D4095V、ZP0~P9Sa ○ ○ ○ ○ ○ ○Sb ○ ○ ○ ○ ○ ○D ○ ○ ○* ○* ○ ○• When operation control “EN”=1 or “EN↑” ( P instruction) changes from 0→1, will perform the 48 bits divisionoperation. Dividend and divisor are each formed by three consecutive registers starting by Sa and Sbrespectively. If the result is zero, ‘D=0’ output will be set to 1. If divisor is zero then the ‘ERR’ will be set to 1and the resultant register will keep unchanged.• All operands involved in this function are all 48 bits, so Sa, Sb and D are all comprised by 3 consecutiveregisters.Example: 48-bit divisionIn this example dividend formed by register R2, R1, R0 will be divided by divisor formed by register R5, R4, R3. Thequotient will store in R8, R7, and R6.X023P.DIV48EN Sa : R0D=0Sb :R3U/SD :R6ERRSa÷ SbR2 R1 R02147483647R5 R4 R31234567R8 R7 R61739Quotient7-2
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- Page 60 and 61: 5.1.4 Functions Output (FO)The “F
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Advanced Function <strong>Instruction</strong>FUN 23 PDIV4848-BIT DIVISIONFUN 23 PDIV48Operation controlUnsign/SignENU/SLadder symbol23P.DIV48Sa :Sb :D :D=0 Quotient = 0ERRDivisor = 0Sa:Starting register of dividendSb:Starting register of divisorD : Starting register for storing the divisionresult (quotient)Sa,Sb,can combine V, Z, P0~P9 for indexaddressing.OperandRangeHR OR SR ROR DR XRR0∣R3839R3904∣R3967R3968∣R4167R5000∣R8071D0∣D4095V、ZP0~P9Sa ○ ○ ○ ○ ○ ○Sb ○ ○ ○ ○ ○ ○D ○ ○ ○* ○* ○ ○• When operation control “EN”=1 or “EN↑” ( P instruction) changes from 0→1, will perform the 48 bits divisionoperation. Dividend and divisor are each formed by three consecutive registers starting by Sa and Sbrespectively. If the result is zero, ‘D=0’ output will be set to 1. If divisor is zero then the ‘ERR’ will be set to 1and the resultant register will keep unchanged.• All operands involved in this function are all 48 bits, so Sa, Sb and D are all comprised by 3 consecutiveregisters.Example: 48-bit divisionIn this example dividend formed by register R2, R1, R0 will be divided by divisor formed by register R5, R4, R3. Thequotient will store in R8, R7, and R6.X023P.DIV48EN Sa : R0D=0Sb :R3U/SD :R6ERRSa÷ SbR2 R1 R02147483647R5 R4 R31234567R8 R7 R61739Quotient7-2