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Introduction to HSPICE

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<strong>Introduction</strong> <strong>to</strong> <strong>HSPICE</strong>• What’s SPICE?– Simulation Program with Integrated Circuit Emphasis– Development his<strong>to</strong>ry• Star-HSpice environment orientation– Hspui user interface– AvanWaves graph interface• Netlist (.sp) syntax and writing– Basic architecture– Simulation environment setup– Components and source– Performing analysis– Output specifyEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


What’s <strong>HSPICE</strong>• Simulation Program with Integrated CircuitEmphasisSPICE is a general purpose analog electronic circuitsimula<strong>to</strong>r. It is a powerful program that is used in IC and board-level l design <strong>to</strong> check the integrity it of circuit it designs and <strong>to</strong>predict circuit behavior.• Development his<strong>to</strong>rySPICE was developed atthe Electronics ResearchLabora<strong>to</strong>ry of the Universityof California, Berkeley bywith direction from hisresearch advisor, Prof.Donald Pederson. SPICE waslargely a derivative of theCANCER program.P-SpiceSPICESPICE2 SPICE2G.6 SPICE3 etcStar-HSpiceH-SpiceSBT-SpiceSPECTREEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Star-HSpice EnvironmentOrientation• After setup software, before simulation:Create a working folder! CAUTION: No Chinese in direc<strong>to</strong>ry.Ex.C:\lab1\lab1.sp (O)C:\Documents and Settings\Administra<strong>to</strong>r\ 桌 面 \lab1.sp (X)Ouput File TypeOutput listingTransient analysis resultsDC analysis resultsAC analysis resultsTransient analysis measurement resultsDC analysis measurement resultsAC analysis measurement resultsFFT analysis graph data filesOutput status filesNets operation voltagesExtension.lis.tr#.sw#.ac#.mt#.ms#.ma#.ft#.st#.ic#EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Hspui User InterfaceOpen: Open netlist files (.sp)Edt NL: Edit netlest files (.sp)Click!Simulate: Run HSpiceEdt LL:Edit listing files (.lis)Avanwaves:Edit listing files (.lis)EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


AvanWaves Graph InterfaceClick!1.2.3.Right clickEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


• Example_ACBasic ArchitectureSimulationenvironmentsetupComponentsSourcesAnalysis andoutput specifyEnd of fileEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Simulation Environment Setup• .TITLE: First line is initially identified as title.Syntax. .TITLE or (if in first line)Example. .TITLE EXAMPLE_ACor EXAMPLE_AC• .END: End of the file. (must appear in last line of file)Syntax.Example..END.END• Comments: An asterisk (*) as the first nonblank characteror an inline dollar sign ($).Syntax. * or $ Example. *****PARTITION LINE*****or Vdd vdd gnd DC=5V $supply voltage=5V• .OPTION: Control options are set in .OPTIONS statements.Syntax. .OPTION …Example. .OPTION POST=2 PROBEEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Simulation Environment Setup• .LIB: To use the technology files provided by TSMC/UMC.Syntax. .LIB ‘(\)’ Example. .LIB ‘.\NOTHING.l’ TT• .PROT(ECT)/.UNPROT(ECT): Indicate parts notshown in listing files (.lis).Syntax.Example..PROT(ECT) and .UNPRT(ECT).PROT.LIB ‘.\NOTHING.l l’ TT.UNPROT• .INCLUDE: Include other files.Syntax. .INCLUDE ‘(\)’Example. .INCLUDE ‘.\EMPTY.sp’• .MODEL: Create a new model with parameters you provided.Syntax..MODEL + Example..MODEL nch NMOS LEVEL=1+ VT=1.2 KP=200u LAMBDA=0.04EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Simulation Environment Setup• .PARAM: Declare a new variable with initial value you gives.Syntax. .PARAM =pvalueor .PARAM =or .PARAM =‘’Example. .PARAM RL1=20Kor .PARAM RL2=RLor .PARAM RL3=‘2*RL1’• *.GLOBAL: Assign a node name globallySyntax. .GLOBAL …Example. .GLOBAL vdd vss※ Initially ‘0’, ‘gnd’, ‘gnd!’, ‘ground’ are global l node name as ground.EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


• Example_ACSee ExampleSimulationenvironmentsetupEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


• Components:Components & SourcesCapaci<strong>to</strong>rHead charactersDevices representedC (C=)CCapaci<strong>to</strong>rEx. CL out gnd C=1uFDDiodeInduc<strong>to</strong>rJJFETL (L=)Ex. L1 vdd in L=10uFK Mutual induc<strong>to</strong>rResis<strong>to</strong>rLInduc<strong>to</strong>rMMOSFETR (R=)Ex. RL vdd out R=10uFQBJTMOSFETRResis<strong>to</strong>rM T,U,W Transmission line+ (L=) (W=)XSubcircuitEx. M1 d g s gnd+ nch W=30um L=10umBJTQ + (AREA=)Ex. Q1 c b e npn10EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


• Sources:Components & SourcesVoltage sourceHead charactersDevices representedV (DC=)+ (AC=),Ex. Vgs g s DC=2V+ AC=1V,180Current sourceI (DC=)+ (AC=),Ex. I1 in gnd AC=1A,0*Transient Analysis source:PU, SIN, EXP, PWL, SFFM, AMV SIN(+ ,,, )Ex. Vgs g s DC=2V+ AC=1V,180 SIN(0V,1mV,1MHz,0ns)EE2270 Microelectronic Circuits Labora<strong>to</strong>ryEFGHIVVCVSCCCSVCCSCCVSCurrent SourceVoltage Sourcem9763518 Cho, Wei-Han


Components & Sources• Input line format:• Upper and lower case are ignored, exceptin quoted filenames.CodeMeaning1t 1E+12 10 121g 1E+09 10 9• Names:– Names must begin with an alphabetic character.• Delimiters:– Tab, blank, comma, equal sign (=), andparentheses“( )”.• Nodes:1x/1meg 1E+6 106 – Leading zeros are ignored in node numbers.1k 1E+3 10 3 – Trailing alphabetic characters are ignored in1m 1E-3 10 -3node numbers.1u 1E-6 10 -6 • Numbers:1n 1E-9 10 -9– Numbers can use exponential format or1p 1E-12 10 -12 engineering key letter format, but not both (1e-1f 1E-15 10 -1512 or 1p, but not 1e-6u).EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


• Example_ACSee ExampleComponentsSourcesEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Performing Analysis• .OP: Analyze operation point of nodes in circuit.Syntax.Example..OP.OP• .DC: DC analysis <strong>to</strong> sweep parameter, source andtemperature values.Syntax. .DC Example. .DC Vgs 0 5 0.1• .AC: AC analysis <strong>to</strong> sweep frequency.Syntax. .AC Example. .AC DEC 10 1KHz 10MHz• .Tran: Transient analysis <strong>to</strong> sweep time.Syntax. .Tran Example. .Tran 1ns 0 1usEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Performing Analysis• SWEEP: Additional nested sweep analysis. Sweepparameter, source or temperature values but not modelparameters.Syntax.orExample. SWEEP SWEEP .DC Vds 0 5 0.1 SWEEP Vgs 2 5 1.AC DEC 10 1K 10M SWEEP RL 10K 30K 10K.Tran 1ns 1us SWEEP TEMP 0 100 10• .ALTER: Alter condition and repeat analysis.Syntax.Example..ALTER.ALTER.PARAM vt=0.8.ALTER.PARAM vt=1.0….ENDEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Output Specify• .PRINT: Print voltage, current or parameter values in .lis file.Syntax. .PRINT …Example1. .DC Vd 0 5 05 0.5.PRINT DC V(d) I(Vd)Example2. .AC DEC 2 1k 10x.PRINT AC V(d) I(Vd) gain=par(‘V(d)/V(g)’))Result1.Result2.EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Output Specify• .PLOT: Plot simple figures in .lis file.Syntax. .PLOT …Example. .DC Vd 0 5 05 0.5.PLOT DC V(d)EE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Output Specify• .PROBE: Probe data and save in .sw#, .ac#, .tr# files.Syntax. .PROBE …Example. .OPTION POST=2 PROBE.AC DEC 2 1k 1x.PROBE AC Vdb(d)After arrangementAvanWavesEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Output Specify• Output Variable Syntax:DC Analysis Output VariableType Output Variable Syntax MeaningVoltageCurrentParameterV(N)V(N1,N2) N2)VX(D)V(D:X)I(D)IX(D)par(PAR)Voltage at Node NVoltage difference between N1 and N2Voltage at Node X in Device DVoltage at Node X in Device DCurrent through Device DCurrent in<strong>to</strong> Node X in Device DParameter PARpar('Expression')p Parameter described by ExpressionAC Analysis Output VariableType Output Variable Syntax MeaningVoltageV(N)VM(N)VR(N)VI(N)VP(N)VdB(N)EE2270 Microelectronic Circuits Labora<strong>to</strong>ryMagnitude of voltage at Node NMagnitude of voltage at Node NReal part of voltage at Node NImaginary part of voltage at Node NPhase of voltage at Node NMagnitude of voltage at Node N in dBm9763518 Cho, Wei-Han


Output Specify• Output Variable Syntax: (cont’d)AC Analysis Output Variable (cont’d)Type Output Variable Syntax MeaningCurrentParameterI(D)IM(D)IR(D)II(D)IP(D)IdB(D)IMX(D)Magnitude of current through Device DMagnitude of current through Device DReal part of current through Device DImaginary part of current through Device DPhase of current through Device DMagnitude of current through Device D in dBMagnitude of current at Node X in Device DIRX(D)Real part of current at Node X in Device DIIX(D)IPX(D)IdBX(D)par(PAR)par('Expression')*Node X in Devices:MOSFET: 1:D 2:G 3:S 4:BBJT: 1:C 2:B 3:EImaginary part of current at Node X in Device DPhase of current at Node X in Device DMagnitude of current at Node X in Device D in dBParameter PARParameter described by ExpressionEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


See Example• Example_ACAnalysis andoutput specifyEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han


Example• Example_DC1: I D -V DS curve sweep V GSEE2270 Microelectronic Circuits Labora<strong>to</strong>rym9763518 Cho, Wei-Han

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