Solution of Crosstalk in TFT - Solomon Systech Limited

Solution of Crosstalk in TFT - Solomon Systech Limited Solution of Crosstalk in TFT - Solomon Systech Limited

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Solomon Systech LimitedSEMICONDUCTOR APPLICATION NOTEApplication NoteSolution of Crosstalk in TFTThis document contains information on a new product. Specifications and information herein are subject tochange without notice.http://www.solomon-systech.comCrosstalk in TFT Rev 1.0 P 1/12 Aug 2008 Copyright © 2008 Solomon Systech Limited

<strong>Solomon</strong> <strong>Systech</strong> <strong>Limited</strong>SEMICONDUCTOR APPLICATION NOTEApplication Note<strong>Solution</strong> <strong>of</strong> <strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong>This document conta<strong>in</strong>s <strong>in</strong>formation on a new product. Specifications and <strong>in</strong>formation here<strong>in</strong> are subject tochange without notice.http://www.solomon-systech.com<strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong> Rev 1.0 P 1/12 Aug 2008 Copyright © 2008 <strong>Solomon</strong> <strong>Systech</strong> <strong>Limited</strong>


Contents11. BACKGROUND........................................................................................................................................... 32. ROOT CAUSES............................................................................................................................................ 32.1. DRIVER IC DEPENDENCE .......................................................................................................................... 32.2. PANEL DEPENDENCE................................................................................................................................33. ILLUSTRATION.......................................................................................................................................... 43.1. HORIZONTAL CROSSTALK.......................................................................................................................... 43.1.1. Effect <strong>of</strong> parasitic capacitance (C 1 ) on VCOM............................................................................... 43.1.1.1. Frame <strong>in</strong>version.......................................................................................................................... 43.1.1.2. 1-l<strong>in</strong>e row <strong>in</strong>version.................................................................................................................... 53.2. VERTICAL CROSSTALK............................................................................................................................... 63.2.1. Effect <strong>of</strong> parasitic capacitance (C 2 ) on pixel electrode................................................................... 63.2.1.1. Frame Inversion.......................................................................................................................... 63.2.1.2. 1-l<strong>in</strong>e row <strong>in</strong>version.................................................................................................................... 84. SOLUTION ................................................................................................................................................... 84.1. DRIVER IC LEVEL ..................................................................................................................................... 84.2. PANEL LEVEL.......................................................................................................................................... 10<strong>Solomon</strong> <strong>Systech</strong> Aug 2008 P 2/12 Rev 1.0 <strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong>


Application notes on CROSSTALK (<strong>TFT</strong> SERIES)1. Background<strong>Crosstalk</strong> <strong>in</strong> general is a visual defect that causes contrast difference <strong>in</strong> some areas <strong>of</strong> display which display thesame grayscale. It occurs because <strong>of</strong> the <strong>in</strong>terference caused by adjacent pixels.Because there are transistors to isolate its pixel from data l<strong>in</strong>es <strong>in</strong> non-select period per frame, <strong>TFT</strong> panels havea better performance on crosstalk when compared with STN/CSTN panel.2. Root causes2.1. Driver IC dependenceThere are ma<strong>in</strong>ly three driver IC dependent parameters which may cause crosstalk.• Driv<strong>in</strong>g strength <strong>of</strong> VCOM p<strong>in</strong>.i. Reference voltage (VCIX2) for VCOM level generation is not strong enough. VCOMlevel is distorted when data l<strong>in</strong>es are toggl<strong>in</strong>g.• Driver IC VCOM p<strong>in</strong> output resistance on VCOMH/VCOML level output (R on <strong>in</strong> Fig 1)i. Larger output resistance <strong>of</strong> VCOM p<strong>in</strong> causes larger RC between sources & VCOM• Driv<strong>in</strong>g strength <strong>of</strong> reference analog buffer voltage output (VLCD) from source p<strong>in</strong>s.i. In some display patterns, all pixels <strong>in</strong> the same scan l<strong>in</strong>e are display<strong>in</strong>g same graylevel. Sources output load<strong>in</strong>g are <strong>in</strong>creased and so cause distortion <strong>in</strong> output levelwhen compare with other scan l<strong>in</strong>es which are display<strong>in</strong>g different grey level.2.2. Panel DependenceThere are ma<strong>in</strong>ly three panel dependent parameters which may cause crosstalk.• Parasitic capacitance between VCOM & Source (C 1 <strong>in</strong> Fig 1)i. This parasitic capacitance causes larger RC between Source & VCOM.• Parasitic capacitance between pixel electrode & Source (C 2 <strong>in</strong> Fig 1)i. This parasitic capacitance causes coupl<strong>in</strong>g <strong>of</strong> source signal to pixel electrode even <strong>in</strong>non-selection period <strong>of</strong> a frame.• Resistance <strong>of</strong> ITO layout <strong>of</strong> VCOM & Source (R sheet ,R ITO <strong>in</strong> Fig 1)i. This parasitic resistance causes larger RC between Source & VCOM.<strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong> Rev 1.0 P 3/12 Aug 2008 <strong>Solomon</strong> <strong>Systech</strong>


Data l<strong>in</strong>e AData l<strong>in</strong>e BLCD moduleGate l<strong>in</strong>eDriver ICGate l<strong>in</strong>eC 2C 1Pixel ElectrodeC sTo Common ElectrodeVCOMR sheetR ITOR onFig 1: Equivalent circuit <strong>of</strong> LCD module (Cs on common) & Driver IC3. IllustrationThere are ma<strong>in</strong>ly two k<strong>in</strong>ds <strong>of</strong> crosstalk, horizontal crosstalk & vertical crosstalk. Below examples are assumedto use normally white, Cs on common & DC VCOM driv<strong>in</strong>g scheme.3.1. Horizontal <strong>Crosstalk</strong>• Horizontal crosstalk is ma<strong>in</strong>ly caused by common electrode signal distortion.• This distortion is caused by capacitive coupl<strong>in</strong>g between the data-l<strong>in</strong>es (Source) and common sheetelectrode (VCOM) through a parasitic capacitor (C 1 <strong>in</strong> Fig 1) <strong>in</strong> <strong>TFT</strong> LCD.3.1.1. Effect <strong>of</strong> parasitic capacitance (C 1 ) on VCOM3.1.1.1. Frame <strong>in</strong>versionFig 2: Ideal PatternFig 3: Horizontal <strong>Crosstalk</strong> (frame<strong>in</strong>version)Fig 4: Location <strong>of</strong> data l<strong>in</strong>es forillustration• Fig.2 pattern is usually used for crosstalk evaluation.• Fig.3 shows display affected by horizontal crosstalk (frame <strong>in</strong>version)• Fig.4 shows region A, data l<strong>in</strong>e location A,B and gate X,Y which are used for illustration• Fig.5 shows data l<strong>in</strong>e A, B & VCOM signal waveform.• At Time T1, Frame starts with gray pixels.• At Time T2, voltage <strong>of</strong> all data l<strong>in</strong>es <strong>in</strong> Region A (e.g. Data l<strong>in</strong>e A) goes upward (at upper edge <strong>of</strong> theblack box <strong>in</strong> display pattern).<strong>Solomon</strong> <strong>Systech</strong> Aug 2008 P 4/12 Rev 1.0 <strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong>


• These distort VCOM level (highlighted <strong>in</strong> RED <strong>in</strong> Fig.5) through parasitic capacitance C 1• In between T2 & T3, gate X is turned ON to charge up all storage capacitor C s l<strong>in</strong>ed on gate X tovoltage level (V source – V COM ).• V COM level cannot recovers to its normal value when gate X is turned <strong>of</strong>f at time T3. Therefore, f<strong>in</strong>alvoltage across charged C s is smaller than expected.• Hence lighter gray tone appears on pixels along gate X (Fig. 3) assum<strong>in</strong>g that normally white panel isused.• Vice versa <strong>in</strong> Time T4 & T5, voltage across C s on gate Y pixels is larger than expected. Darker graytone appears on pixels along gate Y.Positive FrameNegative FrameT1T2 T3T4 T5T6Gray Area pixels Black Box pixels Gray Area pixelsData l<strong>in</strong>e AData l<strong>in</strong>e BBlack Box pixelsGate X openGate X closeGate Y openGate Y closeVCOMVCOM can’t recover before gate OFF3.1.1.2. 1-l<strong>in</strong>e <strong>in</strong>versionFig 5: VCOM signal distorted by data l<strong>in</strong>e A (frame <strong>in</strong>version)Fig 6: Ideal Pattern Fig 7: Horizontal <strong>Crosstalk</strong> (l<strong>in</strong>e<strong>in</strong>version)Fig 8: Location <strong>of</strong> data l<strong>in</strong>es forillustration• Fig.6 pattern is the ideal pattern without crosstalk effect.• Fig.7 shows display affected by horizontal crosstalk (l<strong>in</strong>e <strong>in</strong>version)• Fig.8 shows data l<strong>in</strong>e location A & B, gate X & Y which are used to illustrate horizontal crosstalk.<strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong> Rev 1.0 P 5/12 Aug 2008 <strong>Solomon</strong> <strong>Systech</strong>


• Fig.9 shows data l<strong>in</strong>e A, B & VCOM signal waveform• Data l<strong>in</strong>e voltage toggles per l<strong>in</strong>e <strong>in</strong>stead <strong>of</strong> on edge on black box.• In gray area pixel region (e.g. pixel B1 <strong>in</strong> gate X), Data l<strong>in</strong>e output voltage sw<strong>in</strong>g is small.• Distorted V COM level can recover to normal level before every gate OFF. Therefore, voltage across C shaven’t been affected <strong>in</strong> this area.• In black box pixel region (e.g. pixel B2 <strong>in</strong> gate Y), Data l<strong>in</strong>e output voltage sw<strong>in</strong>g is large.• Distorted V COM cannot recover to normal before gate OFF. Therefore, voltage across C s (V sois smaller than expected. Lighter gray tone appears on that region.1 Frameurce-V COM )Gray Area pixelsGate X ONGate X OFFBlack Box pixelsGray Area pixelsData l<strong>in</strong>e AData l<strong>in</strong>e BVCOMPixel B1Gate Y ONGate YVCOM recovers before gate OFFVCOM can’t recover before gate OFFFig 9: VCOM signal distorted by data l<strong>in</strong>e A (l<strong>in</strong>e <strong>in</strong>version)3.2. Vertical <strong>Crosstalk</strong>• Vertical <strong>Crosstalk</strong> is ma<strong>in</strong>ly caused by the parasitic capacitance between the column or data l<strong>in</strong>e andthe liquid-crystal pixel electrode. (C 2 <strong>in</strong> Fig 1)• Information <strong>in</strong>tended for a picture element on a column is coupled <strong>in</strong>to other picture elements on thatcolumn and adjacent columns.• Even though the transistor connect<strong>in</strong>g the data l<strong>in</strong>e to the pixel electrode may be turned <strong>of</strong>f, theparasitic capacitance causes a fraction <strong>of</strong> the data voltage to appear on the pixel electrode, that is,across the liquid crystal pixel.3.2.1. Effect <strong>of</strong> parasitic capacitance (C 2 ) on pixel electrode3.2.1.1. Frame InversionFig 10: Ideal PatternFig 11: Vertical <strong>Crosstalk</strong> (frame<strong>in</strong>version)UFig 12: Vertical <strong>Crosstalk</strong> (frame<strong>in</strong>version)U<strong>Solomon</strong> <strong>Systech</strong> Aug 2008 P 6/12 Rev 1.0 <strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong>


• Fig.10 pattern is the ideal pattern without crosstalk effect.• Fig.11 shows display which is affected by vertical crosstalk (frame <strong>in</strong>version)• Fig.12 sho ws data l<strong>in</strong>e A, B, pixel A1, A2, B1 & B2 location which are used to illustrate verticalcrosstalk.• Fig.13 shows pixel A1 & pixel A2 electrode voltage which are affected by Data l<strong>in</strong>e A• At time T0, gate X is turned ON. C s on pixel A1,B1 are charged up. Voltage on pixel electrode <strong>of</strong> pixelA1 becomes the same voltage as <strong>in</strong> data l<strong>in</strong>e A; pixel B1 becomes the same voltage as <strong>in</strong> data l<strong>in</strong>e B.• At time T1, gate X is turned OFF. Ideally, there should not be any changes <strong>in</strong> voltage level <strong>of</strong> pixelelectrode A1, B1 until gate X is turned ON aga<strong>in</strong> at time T7.• At time T2, changes <strong>in</strong> voltage level <strong>of</strong> data l<strong>in</strong>e A are coupled to pixel electrode A1 & A2 throughparasitic capacitance C 2 , even though gate X has been turned OFF.• For pixel B1 & B2, because there is no change <strong>in</strong> voltage level <strong>of</strong> data l<strong>in</strong>e B, voltage on pixelelectrode B1 is not affected.• RMS voltage <strong>of</strong> pixel A1 is higher than that <strong>of</strong> pixel B1. Therefore, region A1 appears to be darkerthan Region B1.• RMS voltage <strong>of</strong> pixel A2 is lower than that <strong>of</strong> pixel B2. Theref ore, region A2 appears to be lighter thanRegion B2.T 0 T T 2 T 3 T 4 T 5T 6T 7 T 8 T 9 1T 10 T 11 T 12Positive FrameBlack Box pixelsNegative FrameData l<strong>in</strong>e APixelA1 dataPixel A2 dataPixel A1 dataPixel A2 dataPixel electrode A1Black Box pixelsCharge coupl<strong>in</strong>gPixel is charged upPixel electrode B1Pixel is charged upCharge coupl<strong>in</strong>gPixel electrode A2Charge coupl<strong>in</strong>gPixel is charged upCharge coupl<strong>in</strong>gPixel is charged upPixel electrode B2Fig 13: Pixel A1, A2 data which are affected by data l<strong>in</strong>e A signal (frame <strong>in</strong>version)<strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong> Rev 1.0 P 7/12 Aug 2008 <strong>Solomon</strong> <strong>Systech</strong>


3.2.1.2. 1-l<strong>in</strong>e <strong>in</strong>versionFig 14: Ideal Pattern Fig 15: Vertical <strong>Crosstalk</strong> (l<strong>in</strong>e<strong>in</strong>version)Fig 16: Vertical <strong>Crosstalk</strong> (l<strong>in</strong>e<strong>in</strong>version)• Fig.14 pattern is the ideal pattern without crosstalk effect.• Fig.15 shows display affected by vertical crosstalk (l<strong>in</strong>e <strong>in</strong>version)• Fig.16 shows data l<strong>in</strong>e A, B, pixel A1, A2, B1 & B2 location which are used to illustrate verticalcrosstalk <strong>in</strong> l<strong>in</strong>e <strong>in</strong>version• Fig.17 shows pixel A1 & pixel A2 electrode voltage which is affected by Data l<strong>in</strong>e A• RMS voltages <strong>of</strong> pixel electrode A1, A2 are not the same as RMS voltage <strong>of</strong> pixel electrode B1, B2.• Contrast is different between A1 & B1, A2 & B2. Actual gray tone depends on display pattern shown.T0 T1 T2 T3Gate X ONGate X OFFGate Y ON Gate Y OFFData l<strong>in</strong>e APixel A1 dataData l<strong>in</strong>e BPixel B1 dataPixel A1Pixel B1Pixel A2Pixel B2Fig 17: Pixel A1, A 2 data which are affected by data l<strong>in</strong>e A signal (1-l<strong>in</strong>e <strong>in</strong>version)4. <strong>Solution</strong>4.1. Driver IC level4.1.1. VCIX3 reference for VCOM & VLCD• In the future, SSL <strong>TFT</strong> driver products will be added VCIX3 as reference to generate VCOMwaveform. This <strong>in</strong>creases VCOM voltage level stability, especially <strong>in</strong> high load<strong>in</strong>g panel. (panel size<strong>Solomon</strong> <strong>Systech</strong> Aug 2008 P 8/12 Rev 1.0 <strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong>


3.5 <strong>in</strong>ch).• In these drivers, VCIX3 is also act as a source to generate VLCD. More stable VLCD will <strong>in</strong>creasesource voltage reference output stability. This m<strong>in</strong>imizes source voltage output distortion <strong>in</strong> highload<strong>in</strong>g pattern (e.g. pla<strong>in</strong> gray).4.1.2. VCOM ON resistance reduction• VCOM p<strong>in</strong> ON resistance is carefully taken care <strong>in</strong> IC design phase <strong>of</strong> SSL <strong>TFT</strong> drivers.4.1.3. Charge shar<strong>in</strong>g on Source• In most SSL <strong>TFT</strong> driver products (e.g. SSD2220, SSD2215, SSD1269), Charge shar<strong>in</strong>g <strong>in</strong> data l<strong>in</strong>e(Source) is used. Before every l<strong>in</strong>e/frame start, data l<strong>in</strong>e will be pre-charged to an <strong>in</strong>termediate(CDUM0) level Fig. 18. Longer rise/fall time <strong>of</strong> source m<strong>in</strong>imizes effect <strong>of</strong> capacitive coupl<strong>in</strong>g toVCOM waveform, <strong>in</strong> additional to power sav<strong>in</strong>g.Data l<strong>in</strong>e (Source)Fig 18. Charge shar<strong>in</strong>g <strong>in</strong> data l<strong>in</strong>e <strong>in</strong> SSL productFig 19. Charge shar<strong>in</strong>g <strong>in</strong> VCOM <strong>in</strong> SSL product4.1.4. Dot <strong>in</strong>version & column <strong>in</strong>version• In the future, SSL <strong>TFT</strong> drivers, which will support high resolution, will feature with DC VCOM withcolumn & dot <strong>in</strong>version. When every gate turns ON, there are always equal numbers <strong>of</strong> data l<strong>in</strong>es(source) have positive & negative polarity. Capacitive coupl<strong>in</strong>g effect will be cancelled out each other.We use 1-l<strong>in</strong>e column <strong>in</strong>version as an example. Data l<strong>in</strong>e A1 & A2 (location shown <strong>in</strong> fig 20) are datal<strong>in</strong>e which is adjacent to each other. In 1-l<strong>in</strong>e column <strong>in</strong>version, adjacent data l<strong>in</strong>e (e.g. A1 & A2) havesignal which is always out <strong>of</strong> phrase with each other (provided that display content <strong>of</strong> these 2 l<strong>in</strong>es isthe same) as shown <strong>in</strong> fig 21. Capacitive coupl<strong>in</strong>g caused by these data l<strong>in</strong>e will then be cancelled outwith each other. Similar phenomenon happens <strong>in</strong> dot <strong>in</strong>version driv<strong>in</strong>g mode.Fig 20. Location <strong>of</strong> Data l<strong>in</strong>e A1 & A2 <strong>in</strong> illustration <strong>of</strong> column <strong>in</strong>version<strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong> Rev 1.0 P 9/12 Aug 2008 <strong>Solomon</strong> <strong>Systech</strong>


1 st Frame 2 nd FrameT1T2 T3 T4 T5 T6Gray Area pixels Black Box pixels Gray Area pixelsData l<strong>in</strong>eOut <strong>of</strong> phase signalBlack Box pixelsData l<strong>in</strong>e A2VCOM4.2.Effect <strong>of</strong> coupl<strong>in</strong>g caused by A1 & A2 is cancelled outPanel levelFig 21. Data l<strong>in</strong>e & VCOM waveform <strong>in</strong> column <strong>in</strong>version• M<strong>in</strong>imize parasitic capacitance between VCOM & Source <strong>in</strong> panel layout.• M<strong>in</strong>imize parasitic capacitance between Source & pixel electrode <strong>in</strong> panel layout.• M<strong>in</strong>imize ITO resistance on VCOM & Source p<strong>in</strong>. Suggested Source p<strong>in</strong> & VCOM p<strong>in</strong> resistance are


Fig 22. Suggested ITO resistance requirement on panel layout<strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong> Rev 1.0 P 11/12 Aug 2008 <strong>Solomon</strong> <strong>Systech</strong>


<strong>Solomon</strong> <strong>Systech</strong> reserves the right to make changes without further notice to any products here<strong>in</strong>. <strong>Solomon</strong> <strong>Systech</strong> makes no warranty, representation orguarantee regard<strong>in</strong>g the suitability <strong>of</strong> its products for any particular purpose, nor does <strong>Solomon</strong> <strong>Systech</strong> assume any liability aris<strong>in</strong>g out <strong>of</strong> the application or use<strong>of</strong> any product or circuit, and specifically disclaims any and all liability, <strong>in</strong>clud<strong>in</strong>g without limitation consequential or <strong>in</strong>cidental damages. “Typical” parameterscan and do vary <strong>in</strong> different applications. All operat<strong>in</strong>g parameters, <strong>in</strong>clud<strong>in</strong>g “Typicals” must be validated for each customer application by customer’stechnical experts. <strong>Solomon</strong> <strong>Systech</strong> does not convey any license under its patent rights nor the rights <strong>of</strong> others. <strong>Solomon</strong> <strong>Systech</strong> products are not designed,<strong>in</strong>tended, or authorized for use as components <strong>in</strong> systems <strong>in</strong>tended for surgical implant <strong>in</strong>to the body, or other applications <strong>in</strong>tended to support or susta<strong>in</strong> life, orfor any other application <strong>in</strong> which the failure <strong>of</strong> the <strong>Solomon</strong> <strong>Systech</strong> product could create a situation where personal <strong>in</strong>jury or death may occur. Should Buyerpurchase or use <strong>Solomon</strong> <strong>Systech</strong> products for any such un<strong>in</strong>tended or unauthorized application, Buyer shall <strong>in</strong>demnify and hold <strong>Solomon</strong> <strong>Systech</strong> and its<strong>of</strong>fices, employees, subsidiaries, affiliates, and distributors harmless aga<strong>in</strong>st all claims, costs, damages, and expenses, and reasonable attorney fees aris<strong>in</strong>g out<strong>of</strong>, directly or <strong>in</strong>directly, any claim <strong>of</strong> personal <strong>in</strong>jury or death associated with such un<strong>in</strong>tended or unauthorized use, even if such claim alleges that <strong>Solomon</strong><strong>Systech</strong> was negligent regard<strong>in</strong>g the design or manufacture <strong>of</strong> the part.http://www.solomon-systech.com<strong>Solomon</strong> <strong>Systech</strong> Aug 2008 P 12/12 Rev 1.0 <strong>Crosstalk</strong> <strong>in</strong> <strong>TFT</strong>

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