HX8347 - Adafruit
HX8347 - Adafruit HX8347 - Adafruit
HX8347-G(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverGeneral timing diagram in RGB interface is as follow.DATA SHEET Preliminary V01Vertical Sync.0 1VBPInvisible Image= Timing information what is not possible to see on the display= Blanking TimeDE = ‘0’ (Low)VPVDISPVisible Image= Image which can see on the display= ActiveDE = ‘1' (high)VFPHorizontal Sync.10HBP HDISP HFPHPFigure 4.32: RGB interface circuit input timing diagramThe image information is correct on the display when the timings are in range on theinterface. However, the image information will be incorrect on the display, when timingsare out of the range on the RGB interface and the correct image information will bedisplayed automatically (by the display module) on the next frame (vertical sync.), whenthere is returned from out of the range to in range RGB interface timings.Himax ConfidentialFor Go-tek OnlyThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.50-October, 2009
HX8347-G(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverDATA SHEET Preliminary V011-Frame (T VP)V Back Porch (T VBP)VSV Front Porch (T VFP)HSDE1-Line (T HP)H Back Porch (T HBP)HSValid data area ( THDISP)H Front Porch (T HFP)DOTCLKDEData BusIn-ValidD1D2 D3 D4D5DnIn-ValidLatch dataIn-ValidD1D2 D3 D4D5DnNote: (1) RGB mode 2 doesn’t need DE signal(2) EPL=’0’, VSPL=’0’, HSPL=’0’ and DPL=’0’ of SETRGBIF (32H) command.Figure 4.33: RGB mode timing diagramHimax ConfidentialFor Go-tek OnlyThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.51-October, 2009
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<strong>HX8347</strong>-G(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverGeneral timing diagram in RGB interface is as follow.DATA SHEET Preliminary V01Vertical Sync.0 1VBPInvisible Image= Timing information what is not possible to see on the display= Blanking TimeDE = ‘0’ (Low)VPVDISPVisible Image= Image which can see on the display= ActiveDE = ‘1' (high)VFPHorizontal Sync.10HBP HDISP HFPHPFigure 4.32: RGB interface circuit input timing diagramThe image information is correct on the display when the timings are in range on theinterface. However, the image information will be incorrect on the display, when timingsare out of the range on the RGB interface and the correct image information will bedisplayed automatically (by the display module) on the next frame (vertical sync.), whenthere is returned from out of the range to in range RGB interface timings.Himax ConfidentialFor Go-tek OnlyThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.50-October, 2009
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