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HX8347 - Adafruit

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<strong>HX8347</strong>-G(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverDATA SHEET Preliminary V01These commands (R02h~R09h) are used to define area of frame memory whereMCU can access. The values of SC[15:0], EC[15:0], SP[15:0] and EP[15:0] arereferred when RAMWR command comes. Each value of SC[15:0], EC[15:0]represents one column line in the Frame Memory. Each value of SP[15:0], EP[15:0]represents one page line in the Frame Memory.6.9 Partial area start row register (PAGE0 -0A~0Bh)R/WDNCRB7RB6 RB5 RB4 RB3 RB2 RB1 RB0W1PSL15PSL14PSL13PSL12PSL11PSL10PSL9PSL8R 1PSL15PSL14PSL13PSL12PSL11PSL10PSL9PSL8Figure 6.12: Partial area start row register upper byte (PAGE0 -0Ah)R/WDNCRB7RB6 RB5 RB4 RB3 RB2 RB1 RB0W1PSL7PSL6PSL5PSL4PSL3PSL2PSL1PSL0R 1PSL7PSL6PSL5PSL4PSL3PSL2PSL1PSL0Figure 6.13: Partial area start row register low byte (PAGE0 -0Bh)6.10 Partial area end row register (PAGE0 -0C~0Dh)R/WDNCRB7RB6 RB5 RB4 RB3 RB2 RB1 RB0W1PEL15PEL14PEL13PEL12PEL11PEL10PEL9PEL8R 1PEL15PEL14PEL13PEL12PEL11PEL10PEL9PEL8Figure 6.14: Partial area end row register upper byte (PAGE0 -0Ch)R/WDNCRB7RB6 RB5 RB4 RB3 RB2 RB1 RB0W1PEL7PEL6PEL5PEL4PEL3PEL2PEL1PEL0Himax ConfidentialR 1PEL7PEL6For Go-tek OnlyThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.PEL5PEL4PEL3PEL2PEL1Figure 6.15: Partial area end row register low byte (PAGE0 -0Dh)PEL0-P.126-October, 2009

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