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LITERATUREIn addition to the produc
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Intel Corporation makes no warranty
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PREFACEExternal LiteratureMany aspe
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Table of ContentsCHAPTER 1PageINTRO
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TABLE OF CONTENTSCHAPTER 9PageVIRTU
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TABLE OF CONTENTSLIST OF FIGURESFig
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Introduction to Protected 1Multitas
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INTRODUCTION TO PROTECTED MULTITASK
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inter INTRODUCTION TO PROTECTED MUL
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111'eI INTRODUCTION TO PROTECTED MU
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INTRODUCTION TO PROTECTED MULTITASK
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INTRODUCTION TO PROTECTED MULTITASK
- Page 29: Using Hardware2Protection Features
- Page 32 and 33: USING HARDWARE PROTECTION,FEATURESs
- Page 34 and 35: interUSING HARDWARE PROTECTION FEAT
- Page 36 and 37: USING HARDWARE PROTECTION FEATURES(
- Page 38 and 39: USING HARDWARE PROTECTION FEATURES
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- Page 56 and 57: lSLDTFORMATRt;;SERV~~"O~iA~~.~ijij
- Page 59 and 60: CHAPTER 3REAL MEMORY MANAGEMENTIn d
- Page 61 and 62: REAL MEMORY MANAGEMENTIALLOCATEGATE
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- Page 65 and 66: REAL MEMORY MANAGEMENTGLOBAL DESCRI
- Page 67 and 68: REAL MEMORY MANAGEMENTTable 3-1. Ac
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- Page 73 and 74: REAL MEMORY MANAGEMENTPL/M-286 COMP
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- Page 83 and 84: CHAPTER 4TASK MANAGEMENTThe primary
- Page 85 and 86: TASK MANAGEMENTThe processor update
- Page 87 and 88: TASK MANAGEMENTState Model of Task
- Page 89 and 90: TASK MANAGEMENTeLI and STI instruct
- Page 91 and 92: TASK MANAGEMENTexample, when an app
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- Page 95 and 96: TASK MANAGEMENTLOTDLOT ALIAS-LOTTSS
- Page 97 and 98: TASK MANAGEMENTiAPX286 MACRO ASSEMB
- Page 99: Data Sharing, Aliasing,5and Synchro
- Page 102 and 103: DATA SHARING, ALIASING, AND SYNCHRO
- Page 104 and 105: DATA SHARING, ALIASING, AND SYNCHRO
- Page 106 and 107: DATA SHARING, ALIASING, AND SYNCHRO
- Page 108 and 109: DATA SHARING, ALIASING, AND SYNCHRO
- Page 110 and 111: DATA SHARING, ALIASING, AND SYNCHRO
- Page 112 and 113: DATA SHARING, ALIASING, AND SYNCHRO
- Page 114 and 115: DATA SHARING, ALIASING, AND SYNCHRO
- Page 116 and 117: IntelDATA SHARING, ALIASING, AND SY
- Page 119: Signals and Interrupts6'.
- Page 122 and 123: SIGNALS AND INTERRUPTSWhen an inter
- Page 124 and 125: SIGNALS AND INTERRUPTSSTACK.. .---.
- Page 126 and 127: IntelSIGNALS AND INTERRUPTSIf such
- Page 128 and 129: SIGNALS AND INTERRUPTStechnique doe
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IIIIIIIIIIIIIIIIIIIIIIIIII
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CHAPTER 7HANDLING EXCEPTION CONDITI
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HANDLING EXCEPTION CONDITIONSInterr
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interHANDLING EXCEPTION CONDITIONSI
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HANDLING EXCEPTION CONDITIONSThe pr
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Input/Output8
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INPUT /OUTPUTOUTOUTSSTIeLILOCKoutpu
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INPUT/OUTPUTRequirements for Parall
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INPUT /OUTPUTAPPLICATIONDEVICE DRIV
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Virtual Memory9
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VIRTUAL MEMORYmay attach other mean
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VIRTUAL MEMORY• TSSs that point t
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VIRTUAL MEMORYSOFTWARE POLICIESA vi
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VIRTUAL MEMORYat once. It then beco
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IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
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SYSTEM INITIALIZATIONINITIALIZING F
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iAPX286 MACRO ASSEMBLER Enter Prote
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iAPX286MAeRJ~ASSE~BlfKLoeOBJ~nter P
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iAPX286 "'ACRO AssiMBLEREni.or Prot
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-"~o~
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iAPX2~6 MACRO ASSEMBLEREnter Protec
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iAPX286 MACR~ ASSEMBLER D:FIN= SEGM
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Binding and Loading11
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BINDING AND LOADINGModules are rele
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BINDING AND LOADINGThe model behind
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interBINDING AND LOADING• Constru
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BINDING AND LOADING4748495051525354
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BINDING AND LOADINGPL-O procedures
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infel'BINDING·AND LOADINGc. If the
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BINDING AND LOADINGBINDINGLOADERTAS
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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interBINDING AND LOADINGPL/M-286 CO
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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CHAPTER 12NUMERICS PROCESSOR EXTENS
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NUMERICS PROCESSOR EXTENSIONTable 1
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NUMERICS PROCESSOR EXTENSIONThe off
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CHAPTER 13EXTENDED PROTECTIONEven t
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EXTENDED PROTECTIONARPL adjusts the
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EXTENDED PROTECTIONSEND PRIVILEGE L
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GLOSSARY8254 Programmable Interval
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GLOSSARYCS (code segment) register:
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GLOSSARYhandler table: a table of s
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GLOSSARYmachine status word (MSW):
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GLOSSARYprivileged instruction: an
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GLOSSARYtask: a single thread of ex
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INDEX8089 I/O processor, 8-18254 Pr
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INDEX"invalid TSS" exception, 7-5 t
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INDEXsubsystem, 11-4swapping, 5-12,
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interALABAMAtA.rrow ElectroniCs, In
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intJINTEL EUROPEAN SALES OFFICESBEL
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intJU.S. SERVICE OFFICESCALIFORNIAI