- Page 2 and 3: LITERATUREIn addition to the produc
- Page 4 and 5: Intel Corporation makes no warranty
- Page 6 and 7: PREFACEExternal LiteratureMany aspe
- Page 8: Table of ContentsCHAPTER 1PageINTRO
- Page 11 and 12: TABLE OF CONTENTSCHAPTER 9PageVIRTU
- Page 13 and 14: TABLE OF CONTENTSLIST OF FIGURESFig
- Page 15: Introduction to Protected 1Multitas
- Page 18 and 19: INTRODUCTION TO PROTECTED MULTITASK
- Page 20 and 21: inter INTRODUCTION TO PROTECTED MUL
- Page 22 and 23: 111'eI INTRODUCTION TO PROTECTED MU
- Page 24 and 25: INTRODUCTION TO PROTECTED MULTITASK
- Page 26 and 27: INTRODUCTION TO PROTECTED MULTITASK
- Page 31 and 32: CHAPTER 2USING HARDWARE PROTECTION
- Page 33 and 34: USING HARDWARE PROTECTION FEATURESo
- Page 35 and 36: USING HARDWARE PROTECTION FEATURES7
- Page 37 and 38: USING HARDWARE PROTECTION FEATURESR
- Page 39 and 40: USING HARDWARE PROTECTION FEATURES7
- Page 41 and 42: USING HARDWARE PROTECTION FEATURES~
- Page 43 and 44: USING HARDWARE PROTECTION FEATURESI
- Page 45 and 46: USING HARDWARE PROTECTION FEATURESS
- Page 47 and 48: USING HARDWARE PROTECTION FEATURESN
- Page 49 and 50: USING HARDWARE PROTECTION FEATUREST
- Page 51 and 52: USING HARDWARE PROTECTION FEATUREST
- Page 53 and 54: USING HARDWARE PROTECTION FEATURESP
- Page 55 and 56: USING HARDWARE PROTECTION FEATURESP
- Page 57: Real Memory Management3
- Page 60 and 61: interREAL MEMORY MANAGEMENTD -AVAIL
- Page 62 and 63: REAL MEMORY MANAGEMENT"FREE"STARTLI
- Page 64 and 65: REAL MEMORY MANAGEMENTALLOCATEDMEMO
- Page 66 and 67: inlerREAL MEMORY MANAGEMENTBEFOREAF
- Page 68 and 69: REAL MEMORY MANAGEMENTADVANCED MEMO
- Page 70 and 71: REAL MEMORY MANAGEMENTBEFORE CASE #
- Page 72 and 73: REAL MEMORY MANAGEMENTBEFOREJ "USED
- Page 74 and 75: REAL MEMORY MANAGEMENTPL/M-286 COMP
- Page 76 and 77: REAL MEMORY MANAGEMENTPL/M-286 COMP
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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Task Management4
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CHAPTER 4TASK MANAGEMENTThe primary
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TASK MANAGEMENTThe processor update
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TASK MANAGEMENTState Model of Task
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TASK MANAGEMENTeLI and STI instruct
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TASK MANAGEMENTexample, when an app
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TASK MANAGEMENTThis additional stat
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TASK MANAGEMENTLOTDLOT ALIAS-LOTTSS
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TASK MANAGEMENTiAPX286 MACRO ASSEMB
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Data Sharing, Aliasing,5and Synchro
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DATA SHARING, ALIASING, AND SYNCHRO
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DATA SHARING, ALIASING, AND SYNCHRO
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DATA SHARING, ALIASING, AND SYNCHRO
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DATA SHARING, ALIASING, AND SYNCHRO
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DATA SHARING, ALIASING, AND SYNCHRO
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DATA SHARING, ALIASING, AND SYNCHRO
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DATA SHARING, ALIASING, AND SYNCHRO
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IntelDATA SHARING, ALIASING, AND SY
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Signals and Interrupts6'.
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SIGNALS AND INTERRUPTSWhen an inter
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SIGNALS AND INTERRUPTSSTACK.. .---.
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IntelSIGNALS AND INTERRUPTSIf such
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SIGNALS AND INTERRUPTStechnique doe
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IIIIIIIIIIIIIIIIIIIIIIIIII
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CHAPTER 7HANDLING EXCEPTION CONDITI
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HANDLING EXCEPTION CONDITIONSInterr
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interHANDLING EXCEPTION CONDITIONSI
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HANDLING EXCEPTION CONDITIONSThe pr
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Input/Output8
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INPUT /OUTPUTOUTOUTSSTIeLILOCKoutpu
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INPUT/OUTPUTRequirements for Parall
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INPUT /OUTPUTAPPLICATIONDEVICE DRIV
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Virtual Memory9
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VIRTUAL MEMORYmay attach other mean
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VIRTUAL MEMORY• TSSs that point t
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VIRTUAL MEMORYSOFTWARE POLICIESA vi
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VIRTUAL MEMORYat once. It then beco
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IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
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SYSTEM INITIALIZATIONINITIALIZING F
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iAPX286 MACRO ASSEMBLER Enter Prote
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iAPX286MAeRJ~ASSE~BlfKLoeOBJ~nter P
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iAPX286 "'ACRO AssiMBLEREni.or Prot
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-"~o~
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iAPX2~6 MACRO ASSEMBLEREnter Protec
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iAPX286 MACR~ ASSEMBLER D:FIN= SEGM
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Binding and Loading11
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BINDING AND LOADINGModules are rele
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BINDING AND LOADINGThe model behind
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interBINDING AND LOADING• Constru
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BINDING AND LOADING4748495051525354
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BINDING AND LOADINGPL-O procedures
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infel'BINDING·AND LOADINGc. If the
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BINDING AND LOADINGBINDINGLOADERTAS
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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interBINDING AND LOADINGPL/M-286 CO
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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CHAPTER 12NUMERICS PROCESSOR EXTENS
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NUMERICS PROCESSOR EXTENSIONTable 1
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NUMERICS PROCESSOR EXTENSIONThe off
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CHAPTER 13EXTENDED PROTECTIONEven t
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EXTENDED PROTECTIONARPL adjusts the
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EXTENDED PROTECTIONSEND PRIVILEGE L
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GLOSSARY8254 Programmable Interval
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GLOSSARYCS (code segment) register:
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GLOSSARYhandler table: a table of s
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GLOSSARYmachine status word (MSW):
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GLOSSARYprivileged instruction: an
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GLOSSARYtask: a single thread of ex
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INDEX8089 I/O processor, 8-18254 Pr
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INDEX"invalid TSS" exception, 7-5 t
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INDEXsubsystem, 11-4swapping, 5-12,
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interALABAMAtA.rrow ElectroniCs, In
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intJINTEL EUROPEAN SALES OFFICESBEL
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intJU.S. SERVICE OFFICESCALIFORNIAI