iAPX 286 Operating System Writers Guide 1983

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infel'BINDING·AND LOADINGc. If the LODTXT record defines an LDT, then, for each entry in the record, obtain the descriptorfrom DESCRP and install it in the LDT.d. If the LODTXT record does not apply to a descriptor table, read the LODTXT record directly··into the selected segment.6. If more LODTXT records remain, go to step 4.7. ··Free the space used for DE8CRP entries.8. The ta~k or tasks .are loaded. Jump to tpe TSS identified in the module header.LOAD-TIME BINDINGAs with any system, it is possible on the iAPX 286 to delay many binding operations until load timeby incorporating binding functions into the loader. The call gates of the iAPX 286 architecture, however,provide an especially convenient and efficient way to delay one ,specific binding operation: namely,oindingofcalls to operating-system primitives. Load-time binding to operating-system primitives is anaqvantage .when• J'he operating system is. under. development, and ODT locations of operating-system segmentdescriptors are subject to change• Programs may execute under different operating systems that have different GDT layoutsData structures for implementing load-time binding are• An export module of specially marked, dummy gates for operating system primitives. Figure 11-4shows how you can create such a module through Builder specifications. The NOT PRESENTspecification marks the gates by resetting the' present bit. Gates used for this purpose must residein the LDT so that Binder (which works only with LDT descriptors) can use them. You need toup4ate this export file only when you change the number or names of operating-system gates.• A table of actual gates for the operating-system primitives. This table must contain, for each primitive.,the gate.name',ii GDT. selector for the segment in which the primitive resides, and the entrypoint (offset) within the segment. It is most convenient to take such information from a Builderexport file that exports the gates for operating-system primitives. The example specifications shownin figure 11~3 create such an export file.Figure 11-5 shows the data flow for load-time binding. By using the gate name from the DESNAMsection, the loader associates a marked gate in the LDT with its gate name. Given the gate name, itlooks up the actual binding information.EXAMPLE LOADERFigure 11-6 shows an example of a loader that reads the iAPX 286 OMF, resolves references tooperating-system primitives, and calls kernel procedures to create a new task. In the interest of simplicity,this .example t:ecogniz~~ only the single-task OMF produced by the Binder, and all error checkingis omitted .. , .. . ..!:,;; . '..'This loader calls the kernel procedures CREATILLDT, LOAD_LDT, LOAD_LDT_GATE,CREATE_TASK, RESERVE~LOTS,arid CHANGE_AR, which are not shown. CREATE_LDTallocates an LDT segment for a new task and installs its descriptors in two of the four GDT slotsSPecified by Tt\SK.:.SEL. LOAD_LDT transfers a descriptor from the LDT of the loader to the LDTof the new task. LOAD_LDT_GATE places a gate in the LDT oUhe new task. CREATE_TASK11-12 121960-001
interBINDING AND LOADINGsystem-IDiAPX286 SYSTEM BUILDER, Vx.yINPUT FILES: :F1:NUC.LNKOUTPUT FILE: (none)CONTROLS SPECIFIED: TITLE(Gates for Load-Time Binding) NOBOOTLOAD NOOBJECTBUILDFILE(:F1:XOSGAT.BLD) PRINT(:F1:XOSGAT.MP2)BUILD FILE: :F1:XOSGAT.BLD123456789101112131415161718192021222324252627282930313233343536373839404142434445SEGMENT NUCLEUS CODE (DPL=0), NUCLEUS DATA (DPL=0),NUCLEUS~STACK(DPL=0);GATEXQ -RESERVE SLOTS (ENTRY=RESERVE SLOTS, DPL=3,XQ - RELINQUISH_SLOTS (ENTRY=RELINQUISH NOT PRESENT) ,SLOTS, DPL=3, NOT PRESENT) ,XQ_ALLOCATE -(ENTRY=ALLOCATE, DPL=3, NOT PRESENT) ,XQ FREE SEG (ENTRY=FREE SEG, DPL=3, NOT PRESENT) ,XQ -CREATE ALIAS (ENTRY=CREATE ALIAS,-DPL=3, NOT PRESENT) ,XQ -CHANGE-AR- (ENTRY=CHANGE AR, DPL=3, NOT PRESENT) ,XQ- WAIT SEMAPHORE (ENTRY=WAIT SEMAPHORE, DPL=3, NOT PRESENT) ,XQ SIGNAL SEMAPHORE- (ENTRY=SIGNAL SEMAPHORE, DPL=3, NOT PRESENT) ,XQ SEND MESSAGE- (ENTRY=SEND MESSAGE, DPL=3, NOT PRESENT) ,XQ RECEIVE- MESSAGE (ENTRY=RECEIVE MESSAGE, DPL=3,-NOT PRESENT) ;TABLEGOT (ENTRY=(NUCLEUS_CODE, NUCLEUS_DATA, NUCLEUS.STACK)),DUMMY (ENTRY=(XQ RESERVE SLOTS,XQ-RELINQUISH SLOTS,XQ-ALLOCATE, -XQ-FREE SEG,XQ-CREATE ALIAS,XQ-CHANGE-AR,XQ-WAIT SEMAPHORE,XQ-SIGNAL SEMAPHORE,XQ-SEND MESSAGE,XQ=RECEIVE_MESSAGE));EXPORT #:F1:XOSGAT.LB2 (KERNELXQ RESERVE SLOTS,XQ-RELINQUISH SLOTS,XQ::)LLOCATE, -XQ FREE SEG,XQ-CREATE ALIAS,XQ -CHANGE-AR,XQ-WAIT SEMAPHORE,XQ-SIGNAL SEMAPHORE,XQ-SEND MESSAGE,XQ=RECEIVE_MESSAGE));ENDBUILD FILE PROCESSING COMPLETEDFigure 11-4. Specifying Dummy Gate Exports11-13121960-001
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LITERATUREIn addition to the produc
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Intel Corporation makes no warranty
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PREFACEExternal LiteratureMany aspe
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Table of ContentsCHAPTER 1PageINTRO
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TABLE OF CONTENTSCHAPTER 9PageVIRTU
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TABLE OF CONTENTSLIST OF FIGURESFig
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Introduction to Protected 1Multitas
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INTRODUCTION TO PROTECTED MULTITASK
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inter INTRODUCTION TO PROTECTED MUL
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111'eI INTRODUCTION TO PROTECTED MU
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Using Hardware2Protection Features
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USING HARDWARE PROTECTION,FEATURESs
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interUSING HARDWARE PROTECTION FEAT
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USING HARDWARE PROTECTION FEATURES(
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USING HARDWARE PROTECTION FEATURES
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESo
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USING HARDWARE PROTECTION FEATURESL
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESE
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inl:el~USING HARDWARE PROTECTION FE
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IntelUSING HARDWARE PROTECTION FEAT
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IntelU~ING HARDWARE PROTECTION FEAT
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lSLDTFORMATRt;;SERV~~"O~iA~~.~ijij
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CHAPTER 3REAL MEMORY MANAGEMENTIn d
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REAL MEMORY MANAGEMENTIALLOCATEGATE
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interREAL MEMORY MANAGEMENTBEFOREAF
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REAL MEMORY MANAGEMENTGLOBAL DESCRI
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REAL MEMORY MANAGEMENTTable 3-1. Ac
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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IIIIIIIIIIIIIIIIIIIIII
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II I telTASK MANAGEMENTCPUTASK REGI
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TASK MANAGEMENTIf the proc~sser, wh
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TASK MANAGEMENTUsually, termination
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TASK MANAGEMENTTASK XTSS TSS TSS TS
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TASK MANAGEMENTSCHEDULING POLICIEST
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TASK MANAGEMENTThe example in figur
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TASK MANAGEMENTREADY QUEUESBY PRIOR
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IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
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CHAPTER 5DATA SHARING, ALIASING, AN
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DATA SHARING, ALIASING, AND SYNCHRO
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interDATA SHARING, ALIASING, AND SV
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CHAPTER 6SIGNALS AND INTERRUPTSInte
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interSIGNALS AND INTERRUPTSlOTGOTTS
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SIGNALS AND INTERRUPTSTable 6-1. In
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SIGNALS AND INTERRUPTSSend interrup
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SIGNALS AND INTERRUPTSprocedure suc
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Handling Exception Conditions 7
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HANDLING EXCEPTION CONDITIONSError
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HANDLING EXCEPTION CONDITIONSAn exc
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HANDLING EXCEPTION CONDITIONSA few
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HANDLING EXCEPTION CONDITIONSAn ins
Page 143 and 144: CHAPTER 8INPUT /OUTPUTMany of the c
Page 145 and 146: INPUT /OUTPUTYou can still take adv
Page 147 and 148: INPUT /OUTPUT• Only the operating
Page 149: INPUT /OUTPUTtask the I/0 procedure
Page 153 and 154: CHAPTER 9VIRTUAL MEMORYThe memory l
Page 155 and 156: VIRTUAL MEMORYthose segments that a
Page 157 and 158: VIRTUAL MEMORY• Return the RAM sp
Page 159 and 160: VIRTUAL MEMORYReplacementThe operat
Page 161 and 162: System Initialization10
Page 163 and 164: CHAPTER 10SYSTEM INITIALIZATIONThe
Page 165 and 166: SYSTEM INITIALIZATIONStarting the f
Page 167 and 168: iAPX286 "ACRO ASSEMBLERLOCOBJEnter
Page 169 and 170: iAPX286 MACRO ASSEMBLEtEnter Protec
Page 171 and 172: iAPX286 MACRO ASSEMBLER·· Enter ~
Page 173 and 174: iAPX286 'UCRO USE148LER Ente,. P,.o
Page 175 and 176: iAPX286 MACRO ASSEMBLEREnt9~ P~otec
Page 177: iAPX286 MACRO ASSEMBLE~ INITIAL TAS
Page 181 and 182: CHAPTER 11BINDING AND LOADINGBindin
Page 183 and 184: BINDING AND LOADINGNamingThe names
Page 185 and 186: BINDING AND LOADING$ COMPACT (NUCLE
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Page 189 and 190: BIND.ING AND LOADINGConverting a Pr
Page 191: BINDING AND LOADINGThe OMF of each
Page 195 and 196: BINDING AND LOADINGPL/M-2B6 COMPILE
Page 197 and 198: BINDING AND LOADI.NGPL/M-286 COMPIL
Page 199 and 200: BINDING AND LOADINGPL/M-286 COMPILE
Page 201 and 202: BINDING AND LOADINGPL/M-2B6 COMPILE
Page 203 and 204: BINDING AND LOAD.INGPL/M-286 COMPIL
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Page 207 and 208: BINDING AND LOADINGPL/M-286 COMPILE
Page 209: Numerics Processor Extension 12
Page 212 and 213: NUMERICS PROCESSOR EXTENSIONMath Pr
Page 214 and 215: interNUMERICS PROCESSOR EXTENSION
Page 217: Extended Protection13
Page 220 and 221: EXTENDED PROTECTIONIndirect NamingT
Page 222 and 223: EXTENDED PROTECTIONanother procedur
Page 225: Glossary
Page 228 and 229: GLOSSARYbootloadable module: a modu
Page 230 and 231: GLOSSARYexception: a processor-dete
Page 232 and 233: GLOSSARYintersegment reference: a r
Page 234 and 235: GLOSSARYoutward call: the attempt t
Page 236 and 237: GLOSSARYscheduling state: one of se
Page 238 and 239: GLOSSARYvirtual address: an address
Page 240 and 241: INDEXES register, 2-17, 2-18, 2-21,
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INDEXpresent bit, 2-2, 2-3, 2-9, 5-
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interu.s. SALES OFFICESALAIWIA IlEQ
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interu.s. DISTRIBUTORSNEW YORK (C"n
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intJINTEL INTERNATIONAL SALES OFFIC
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iAPX 286 Operating System Writers Guide 1983

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