iAPX 286 Operating System Writers Guide 1983

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iAPX286 MACR~ ASSEMBLER D:FIN= SEGMENTS N=EJEO FO, INIT CJC:datePAG=lsyste~-IO iAPXZ86 MAC~O ASS MSlER VX.y ASSEMelY OF MCDUlE S=GMENT_DEF~BJECT .. MOOUlE, PLACED IN :F1: EGS.03J .ASSE~BlE~ t~VOKtO Sy:' :~l:A M286.86 i C l:SEGS.A86....0!.~Lac OBJ LINE SOO~CE1 +1 'TITlEC"OEFINE SEG~ENTS N~EJEJ FOq INIT CODE")Z3 NA~E SEGMENT_DcF0000 ?1?745 INIT_STACKO SEGMENT R~ aetine stack so mode,switc~.6 OW run in prote~ted ~~de .code can7 INIT _STACKO ENDS9 RW Detine alias segment~ whose true0000 (8 10 OW 8 CUP (1) sizo' ,"ust be, .et by the SlOZ8S8lOT_SEG SEGIolENT1??1)11 lOT_SEG ENOS com;nand filelZ13 TSS_SEG SEGMENT, RW0000 (.8 14 OW. a CUP (?)1111)15 TSS_SEG ENOS1617 IOT_SEG SEGotENT RW0000 C 8 18 Ow a OUP (1)?11.1)19 IJT _SEG ENDS20Z1 GDT_SEG SEGME"lT RW0000 (8 U Oil 8 OUP C 1)1?11)Z3 GDT_S:G ENeS2425 ENDASSEMBLY COMPLETE, ~O wARNINGS, Ne EQRCRStn-.-t(5Z~CD~~Figure 10-2. Dummy Segments for ENTP
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LITERATUREIn addition to the produc
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Intel Corporation makes no warranty
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PREFACEExternal LiteratureMany aspe
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Table of ContentsCHAPTER 1PageINTRO
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TABLE OF CONTENTSCHAPTER 9PageVIRTU
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TABLE OF CONTENTSLIST OF FIGURESFig
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Introduction to Protected 1Multitas
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INTRODUCTION TO PROTECTED MULTITASK
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inter INTRODUCTION TO PROTECTED MUL
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111'eI INTRODUCTION TO PROTECTED MU
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Using Hardware2Protection Features
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USING HARDWARE PROTECTION,FEATURESs
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interUSING HARDWARE PROTECTION FEAT
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USING HARDWARE PROTECTION FEATURES(
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USING HARDWARE PROTECTION FEATURES
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESo
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USING HARDWARE PROTECTION FEATURESL
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESE
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inl:el~USING HARDWARE PROTECTION FE
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IntelUSING HARDWARE PROTECTION FEAT
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IntelU~ING HARDWARE PROTECTION FEAT
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lSLDTFORMATRt;;SERV~~"O~iA~~.~ijij
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CHAPTER 3REAL MEMORY MANAGEMENTIn d
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REAL MEMORY MANAGEMENTIALLOCATEGATE
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interREAL MEMORY MANAGEMENTBEFOREAF
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REAL MEMORY MANAGEMENTGLOBAL DESCRI
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REAL MEMORY MANAGEMENTTable 3-1. Ac
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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IIIIIIIIIIIIIIIIIIIIII
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II I telTASK MANAGEMENTCPUTASK REGI
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TASK MANAGEMENTIf the proc~sser, wh
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TASK MANAGEMENTUsually, termination
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TASK MANAGEMENTTASK XTSS TSS TSS TS
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TASK MANAGEMENTSCHEDULING POLICIEST
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TASK MANAGEMENTThe example in figur
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TASK MANAGEMENTREADY QUEUESBY PRIOR
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IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
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CHAPTER 5DATA SHARING, ALIASING, AN
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DATA SHARING, ALIASING, AND SYNCHRO
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interDATA SHARING, ALIASING, AND SV
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CHAPTER 6SIGNALS AND INTERRUPTSInte
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interSIGNALS AND INTERRUPTSlOTGOTTS
Page 125 and 126: SIGNALS AND INTERRUPTSTable 6-1. In
Page 127 and 128: SIGNALS AND INTERRUPTSSend interrup
Page 129 and 130: SIGNALS AND INTERRUPTSprocedure suc
Page 131: Handling Exception Conditions 7
Page 134 and 135: HANDLING EXCEPTION CONDITIONSError
Page 136 and 137: HANDLING EXCEPTION CONDITIONSAn exc
Page 138 and 139: HANDLING EXCEPTION CONDITIONSA few
Page 140 and 141: HANDLING EXCEPTION CONDITIONSAn ins
Page 143 and 144: CHAPTER 8INPUT /OUTPUTMany of the c
Page 145 and 146: INPUT /OUTPUTYou can still take adv
Page 147 and 148: INPUT /OUTPUT• Only the operating
Page 149: INPUT /OUTPUTtask the I/0 procedure
Page 153 and 154: CHAPTER 9VIRTUAL MEMORYThe memory l
Page 155 and 156: VIRTUAL MEMORYthose segments that a
Page 157 and 158: VIRTUAL MEMORY• Return the RAM sp
Page 159 and 160: VIRTUAL MEMORYReplacementThe operat
Page 161 and 162: System Initialization10
Page 163 and 164: CHAPTER 10SYSTEM INITIALIZATIONThe
Page 165 and 166: SYSTEM INITIALIZATIONStarting the f
Page 167 and 168: iAPX286 "ACRO ASSEMBLERLOCOBJEnter
Page 169 and 170: iAPX286 MACRO ASSEMBLEtEnter Protec
Page 171 and 172: iAPX286 MACRO ASSEMBLER·· Enter ~
Page 173 and 174: iAPX286 'UCRO USE148LER Ente,. P,.o
Page 175: iAPX286 MACRO ASSEMBLEREnt9~ P~otec
Page 181 and 182: CHAPTER 11BINDING AND LOADINGBindin
Page 183 and 184: BINDING AND LOADINGNamingThe names
Page 185 and 186: BINDING AND LOADING$ COMPACT (NUCLE
Page 187 and 188: interBINDING AND LOADINGsystem-IDiA
Page 189 and 190: BIND.ING AND LOADINGConverting a Pr
Page 191 and 192: BINDING AND LOADINGThe OMF of each
Page 193 and 194: interBINDING AND LOADINGsystem-IDiA
Page 195 and 196: BINDING AND LOADINGPL/M-2B6 COMPILE
Page 197 and 198: BINDING AND LOADI.NGPL/M-286 COMPIL
Page 199 and 200: BINDING AND LOADINGPL/M-286 COMPILE
Page 201 and 202: BINDING AND LOADINGPL/M-2B6 COMPILE
Page 203 and 204: BINDING AND LOAD.INGPL/M-286 COMPIL
Page 205 and 206: interBINDING AND LOADINGPL/M-286 CO
Page 207 and 208: BINDING AND LOADINGPL/M-286 COMPILE
Page 209: Numerics Processor Extension 12
Page 212 and 213: NUMERICS PROCESSOR EXTENSIONMath Pr
Page 214 and 215: interNUMERICS PROCESSOR EXTENSION
Page 217: Extended Protection13
Page 220 and 221: EXTENDED PROTECTIONIndirect NamingT
Page 222 and 223: EXTENDED PROTECTIONanother procedur
Page 225: Glossary
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GLOSSARYbootloadable module: a modu
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GLOSSARYexception: a processor-dete
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GLOSSARYintersegment reference: a r
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GLOSSARYoutward call: the attempt t
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GLOSSARYscheduling state: one of se
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GLOSSARYvirtual address: an address
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INDEXES register, 2-17, 2-18, 2-21,
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INDEXpresent bit, 2-2, 2-3, 2-9, 5-
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interu.s. SALES OFFICESALAIWIA IlEQ
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interu.s. DISTRIBUTORSNEW YORK (C"n
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intJINTEL INTERNATIONAL SALES OFFIC
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iAPX 286 Operating System Writers Guide 1983

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