iAPX 286 Operating System Writers Guide 1983

IntelSIGNALS AND INTERRUPTSIf such situations can arise, the operating system must• Keep track of whether a task is in hardware-scheduled mode or in software-scheduled mode• Provide services to switch a task between hardware-scheduled and software-scheduled modeNote, however, that an interrupt task that is in software-scheduled mode cannot service interrupts. Ifit is possible for further interrupts of the same type to occur during the time the interrupt task issoftware-scheduled, then switching to software-scheduled mode is not such a good idea. An alternativestrategy is to allocate interrupt-servicing duties among two or more tasks: one hardware-scheduled andthe others software-scheduled. The hardware-scheduled task responds to the interrupt and invokes oneof the software-scheduled tasks through a mechanism such as message-passing as discussed inChapter 5. If there are any delays in servicing that interrupt, it is one of the software-scheduled tasksthat waits, not the hardware-scheduled task.Manage Interrupt ControllerIntel's 8259A Programmable Interrupt Controller (PIC) is key system resource in a multitasking system.The 8259A PIC is a flexible device that gives the main processor the ability to service up to 64 externalevents via the processor's single INTR pin. The 8259A PIC gives software control over such criticalparameters as the relative priorities among interrupts and the means for acknowledging interrupts.Correct operation of the system requires proper use of the interrupt controller. For the operating systemto manage this critical resource is only consistent with the protection features of the iAPX 286.At system initialization the operating system may initialize the 8259A PIC according to system configurationand the needs of the application. Initialization may include• Setting the 8259A to operate in iAPX86 mode• Setting up master/slave relationships when the hardware configuration includes multiple PICs• Specifying whether interrupts are triggered by edge or by level• Setting interrupt priority mode: rotating or masked• Determining whether priority is fully nested (if priority is set by masking)• Determining whether interrupts are acknowledged automatically or by explicit EOI commandRefer to the Component Data Catalog for details of these and other features of the 8259A PIC.If you choose an interrupt policy in which the 8259A automatically determines interrupt priority andautomatically acknowledges interrupts, then there may be no need, after initialization, for either theoperating system or interrupt tasks and procedures to deal with the 8259A. If, on the other hand, youchoose a dynamically changing priority scheme (whether by specific rotation or by mask commands)or explicit end-of-interrupt commands, then you must also choose whether run-time control of the 8259Ais the responsibility of the interrupt tasks and procedures or of the operating system.For the operating system to maintain run-time control over the 8259A PIC, it may provide a proceduresuch as the following that applications programs CALL instead of executing the IRET instruction.PROCFARIRET j Switch toExecution resumestask on back-linkhere upon interrupt6-6121960-001