SH564128FH8N0QHSCR - Itautec

SH564128FH8N0QHSCRApril 11, 2011Block Diagram (Contd.)SCLSDASA0SA1SA2SPDEEPROMSCL V DDSDASA0SA1SA2 WPV DDSPDA0~A14BA0~BA2RASCASWERESETCS0CS1CKE0CKE1ODT0ODT1to all SDRAMs (D0-D15)to all SDRAMs (D0-D15)to all SDRAMs (D0-D15)to all SDRAMs (D0-D15)to all SDRAMs (D0-D15)to all SDRAMs (D0-D15)to SDRAMs (D0-D7)to SDRAMs (D8-D15)to SDRAMs (D0-D7)to SDRAMs (D8-D15)to SDRAMs (D0-D7)to SDRAMs (D8-D15)V DDSPDV DD /V DDQV TTV REFCAV REFDQV SSSPDD0-D15D0-D15D0-D15D0-D15D0-D15Clock WiringCK0/CK0 8 SDRAMsCK1/CK1 8 SDRAMsV DDV DDCK0CK0CK1CK1Notes:1. All address, command and control signal lines are terminated through a series resistor to V TT .2. Address pins A3-A8 and BA0-BA1 are mirrored to devices on the back side of the module (D8-D15).3. Data bits may be swapped within a device. However, DQ/DQS/DM relationship must be maintained as shownon page 6.Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.comEurope: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-39929037