<strong>SH564128FH8N0QHSCR</strong>April 11, 2011Pin Description Table (Contd.)Symbol Type Polarity FunctionA0~A14 SSTL_15 -During a Bank Activate command cycle, address inputs define the row address (RA0-RA14).During a Read or Write command cycle, address inputs define the column address (CA0-CA9).In addition to the column address, AP is used to invoke auto-precharge operation at the end ofthe burst read or write cycle. If AP is high, auto-precharge is selected and BA0, BA1, BA2defines the bank to be precharged. If AP is low, auto-precharge is disabled. During a Prechargecommand cycle, AP is used in conjunction with BA0, BA1, BA2 to control which bank(s) to precharge.If AP is high, all banks will be precharged regardless of the state of BA0, BA1 or BA2. IfAP is low, BA0, BA1 and BA2 are used to define which bank to precharge. A12(BC) is sampledduring READ and WRITE commands to determine if burst chop (on-the-fly) will be performed(HIGH, no burst chop; LOW, burst chopped).RAS, CAS, WE SSTL_15 Active Low RAS, CAS, and WE (along with CS) define the command being entered.DQ0~DQ63 SSTL_15 - Data Input/Output pins.DQS0~DQS7DQS0~DQS7SSTL_15DifferentialCrossingData strobe for input and output data.DM0~DM7 SSTL_15 Active HighSA0~SA2 -SDA -SCL -RESET CMOS Active LowV DD, V SS Supply -V DDQ Supply -DM is an input mask signal for write data. Input data is masked when DM is sampled high coincidentwith that input data during a write access. DM is sampled on both edges of DQS.Although DM pins are input only, the DM loading matches the DQ and DQS loading.These signals are tied at the system to either V SS or V DDSPD to configure the serial SPDEEPROM address range.This bidirectional pin is used to transfer data into or out of the SPD EEPROM. An external resistormay be connected from the SDA bus line to V DDSPD to act as a pullup on the system board.This signal is used to clock data into and out of the SPD EEPROM. An external resistor may beconnected from the SCL bus tied to V DDSPD to act as a pullup on the system board.Asynchronous Reset is active when RESET is LOW, and inactive when RESET is HIGH.RESET must be HIGH during normal operation. RESET is CMOS rail to rail signal with DC highand low at 80% and 20% of V DD .Power and ground for the DDR3 SDRAM input buffers, and core logic. V DD and V DDQ pins aretied to V DD /V DDQ planes on these modules. V SS pins are tied to V SS planes on these modules.Power supply for the DDR3 SDRAM output buffers to provide improved noise immunity. V DDQshares the same power plane as V DD pins.V REFDQ Supply Reference voltage for I/O inputs.V REFCA Supply - Reference voltage for address/command inputs.V DDSPD Supply -Power supply for SPD EEPROM. This supply is separate from the V DD /V DDQ power plane.EEPROM supply is operable from 1.7V to 3.6V.V TT Supply - Termination voltage for address/command/control/clock nets.NC - - No Connect.Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.comEurope: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-39929034
<strong>SH564128FH8N0QHSCR</strong>April 11, 2011DDR3 240-pin DIMM Pin ListPinNoPinNamePinNoPinNamePinNoPinNamePinNoPinNamePinNoPinNamePinNoPinNamePinNoPinNamePinNoPinName1 V REFDQ 31 DQ25 61 A2 91 DQ41 121 V SS 151 V SS 181 A1 211 V SS2 V SS 32 V SS 62 V DD 92 V SS 122 DQ4 152 DM3 182 V DD 212 DM53 DQ0 33 DQS3 63 CK1 93 DQS5 123 DQ5 153 NC 183 V DD 213 NC4 DQ1 34 DQS3 64 CK1 94 DQS5 124 V SS 154 V SS 184 CK0 214 V SS5 V SS 35 V SS 65 V DD 95 V SS 125 DM0 155 DQ30 185 CK0 215 DQ466 DQS0 36 DQ26 66 V DD 96 DQ42 126 NC 156 DQ31 186 V DD 216 DQ477 DQS0 37 DQ27 67 V REFCA 97 DQ43 127 V SS 157 V SS 187 NC 217 V SS8 V SS 38 V SS 68 NC 98 V SS 128 DQ6 158 NC 188 A0 218 DQ529 DQ2 39 NC 69 V DD 99 DQ48 129 DQ7 159 NC 189 V DD 219 DQ5310 DQ3 40 NC 70 A10/AP 100 DQ49 130 V SS 160 V SS 190 BA1 220 V SS11 V SS 41 V SS 71 BA0 101 V SS 131 DQ12 161 NC 191 V DD 221 DM612 DQ8 42 NC 72 V DD 102 DQS6 132 DQ13 162 NC 192 RAS 222 NC13 DQ9 43 NC 73 WE 103 DQS6 133 V SS 163 V SS 193 CS0 223 V SS14 V SS 44 V SS 74 CAS 104 V SS 134 DM1 164 NC 194 V DD 224 DQ5415 DQS1 45 NC 75 V DD 105 DQ50 135 NC 165 NC 195 ODT0 225 DQ5516 DQS1 46 NC 76 CS1 106 DQ51 136 V SS 166 V SS 196 A13 226 V SS17 V SS 47 V SS 77 ODT1 107 V SS 137 DQ14 167 NC 197 V DD 227 DQ6018 DQ10 48 NC 78 V DD 108 DQ56 138 DQ15 168 RESET 198 NC 228 DQ6119 DQ11 49 NC 79 NC 109 DQ57 139 V SS 169 CKE1 199 V SS 229 V SS20 V SS 50 CKE0 80 V SS 110 V SS 140 DQ20 170 V DD 200 DQ36 230 DM721 DQ16 51 V DD 81 DQ32 111 DQS7 141 DQ21 171 A14 201 DQ37 231 NC22 DQ17 52 BA2 82 DQ33 112 DQS7 142 V SS 172 A15 (NC) 202 V SS 232 V SS23 V SS 53 NC 83 V SS 113 V SS 143 DM2 173 V DD 203 DM4 233 DQ6224 DQS2 54 V DD 84 DQS4 114 DQ58 144 NC 174 A12/BC 204 NC 234 DQ6325 DQS2 55 A11 85 DQS4 115 DQ59 145 V SS 175 A9 205 V SS 235 V SS26 V SS 56 A7 86 V SS 116 V SS 146 DQ22 176 V DD 206 DQ38 236 V DDSPD27 DQ18 57 V DD 87 DQ34 117 SA0 147 DQ23 177 A8 207 DQ39 237 SA128 DQ19 58 A5 88 DQ35 118 SCL 148 V SS 178 A6 208 V SS 238 SDA29 V SS 59 A4 89 V SS 119 SA2 149 DQ28 179 V DD 209 DQ44 239 V SS30 DQ24 60 V DD 90 DQ40 120 V TT 150 DQ29 180 A3 210 DQ45 240 V TTCorporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.comEurope: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-39929035
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