DP83848C PHYTER Comm Temp Single Port ... - Texas Instruments

DP83848C7.1.1 Basic Mode Control Register (BMCR)Table 12. Basic Mode Control Register (BMCR), address 0x00Bit Bit Name Default Description15 Reset 0, RW/SC Reset:1 = Initiate software Reset / Reset in Process.0 = Normal operation.This bit, which is self-clearing, returns a value of one until the resetprocess is complete. The configuration is re-strapped.14 Loopback 0, RW Loopback:1 = Loopback enabled.0 = Normal operation.The loopback function enables MII transmit data to be routed to the MIIreceive data path.Setting this bit may cause the descrambler to lose synchronization andproduce a 500 µs “dead time” before any valid data will appear at theMII receive outputs.13 Speed Selection Strap, RW Speed Select:When auto-negotiation is disabled writing to this bit allows the portspeed to be selected.1 = 100 Mb/s.0 = 10 Mb/s.12 Auto-NegotiationEnableStrap, RW Auto-Negotiation Enable:Strap controls initial value at reset.1 = Auto-Negotiation Enabled - bits 8 and 13 of this register are ignoredwhen this bit is set.0 = Auto-Negotiation Disabled - bits 8 and 13 determine the port speedand duplex mode.11 Power Down 0, RW Power Down:1 = Power down.0 = Normal operation.Setting this bit powers down the PHY. Only the register block is enabledduring a power down condition. This bit is OR’d with the inputfrom the PWR_DOWN/INT pin. When the active lowPWR_DOWN/INT pin is asserted, this bit will be set.10 Isolate 0, RW Isolate:1 = Isolates the Port from the MII with the exception of the serial management.0 = Normal operation.9 Restart Auto-Negotiation0, RW/SC Restart Auto-Negotiation:1 = Restart Auto-Negotiation. Re-initiates the Auto-Negotiation process.If Auto-Negotiation is disabled (bit 12 = 0), this bit is ignored. Thisbit is self-clearing and will return a value of 1 until Auto-Negotiation isinitiated, whereupon it will self-clear. Operation of the Auto-Negotiationprocess is not affected by the management entity clearing this bit.0 = Normal operation.8 Duplex Mode Strap, RW Duplex Mode:When auto-negotiation is disabled writing to this bit allows the port Duplexcapability to be selected.1 = Full Duplex operation.0 = Half Duplex operation.www.national.com 42