DP83848C PHYTER Comm Temp Single Port ... - Texas Instruments

DP83848C5.5.2 Interrupt MechanismsThe interrupt function is controlled via register access. Allinterrupt sources are disabled by default. Setting bit 1(INTEN) of MICR (0x11h) will enable interrupts to be output,dependent on the interrupt mask set in the lower byteof the MISR (0x12h). The PWR_DOWN/INT pin is asynchronouslyasserted low when an interrupt conditionoccurs. The source of the interrupt can be determined byreading the upper byte of the MISR. One or more bits in theMISR will be set, denoting all currently pending interrupts.Reading of the MISR clears ALL pending interrupts.Example: To generate an interrupt on a change of link statusor on a change of energy detect power state, the stepswould be:— Write 0003h to MICR to set INTEN and INT_OE— Write 0060h to MISR to set ED_INT_EN andLINK_INT_EN— Monitor PWR_DOWN/INT pinWhen PWR_DOWN/INT pin asserts low, user would readthe MISR register to see if the ED_INT or LINK_INT bitsare set, i.e. which source caused the interrupt. After readingthe MISR, the interrupt bits should clear and thePWR_DOWN/INT pin will deassert.5.6 Energy Detect ModeWhen Energy Detect is enabled and there is no activity onthe cable, the DP83848C will remain in a low power modewhile monitoring the transmission line. Activity on the linewill cause the DP83848C to go through a normal power upsequence. Regardless of cable activity, the DP83848C willoccasionally wake up the transmitter to put ED pulses onthe line, but will otherwise draw as little power as possible.Energy detect functionality is controlled via register EnergyDetect Control (EDCR), address 0x1Dh.www.national.com 36