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CS5531/32/33/34 - Eshop-Rychle.cz

CS5531/32/33/34 - Eshop-Rychle.cz

CS5531/32/33/34 - Eshop-Rychle.cz

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<strong>CS5531</strong>/<strong>32</strong>/<strong>33</strong>/<strong>34</strong>ter can be manipulated by the user to mimic thefunction of a DAC if desired.2.2. Overview of ADC Register Structureand Operating ModesThe <strong>CS5531</strong>/<strong>32</strong>/<strong>33</strong>/<strong>34</strong> ADCs have an on-chip controller,which includes a number of user-accessibleregisters. The registers are used to hold offset andgain calibration results, configure the chip's operatingmodes, hold conversion instructions, and tostore conversion data words. Figure 6 depicts ablock diagram of the on-chip controller’s internalregisters.Each of the converters has <strong>32</strong>-bit registers to functionas offset and gain calibration registers for eachchannel. The converters with two channels havetwo offset and two gain calibration registers, theconverters with four channels have four offset andfour gain calibration registers. These registers holdcalibration results. The contents of these registerscan be read or written by the user. This allows calibrationdata to be off-loaded into an external EE-PROM. The user can also manipulate the contentsof these registers to modify the offset or the gainslope of the converter.The converters include a <strong>32</strong>-bit configuration registerwhich is used for setting options such as thepower down modes, resetting the converter, shortingthe analog inputs, and enabling diagnostic testbits like the guard signal.A group of registers, called Channel Setup Registers,are used to hold pre-loaded conversion instructions.Each channel setup register is <strong>32</strong> bitslong, and holds two 16-bit conversion instructionsreferred to as Setups. Upon power up, these registerscan be initialized by the system microcontrollerwith conversion instructions. The user can theninstruct the converter to perform single or multipleconversions or calibrations with the converter inthe mode defined by one of these Setups.Offset Registers (4 x <strong>32</strong>) Gain Registers (4 x <strong>32</strong>)Offset 1 (1 x <strong>32</strong>)Gain1(1x<strong>32</strong>)Channel SetupRegisters (4 x <strong>32</strong>)Setup 1(1 x 16)Setup 2(1 x 16)Conversion DataRegister (1 x <strong>32</strong>)Data (1 x <strong>32</strong>)Offset 2 (1 x <strong>32</strong>)Offset 3 (1 x <strong>32</strong>)Gain2(1x<strong>32</strong>)Gain3(1x<strong>32</strong>)Setup 3(1 x 16)Setup 5(1 x 16)Setup 4(1 x 16)Setup 6(1 x 16)Read OnlyOffset 4 (1 x <strong>32</strong>)Gain4(1x<strong>32</strong>)Setup 7(1 x 16)Setup 8(1 x 16)SerialInterfaceCSSDISDOSCLKConfiguration Register (1 x <strong>32</strong>)Write OnlyPower Save SelectReset SystemInput ShortGuard SignalVoltage Reference SelectOutput LatchOutput Latch SelectOffset/Gain SelectFilter Rate SelectChannel SelectGainWord RateUnipolar/BipolarOutput LatchDelay TimeOpen Circuit DetectOffset/Gain PointerCommandRegister (1 × 8)Figure 6. <strong>CS5531</strong>/<strong>32</strong>/<strong>33</strong>/<strong>34</strong> Register Diagram16 DS289PP5

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