Power Grid Analysis in VLSI Designs - SERC

1. Temperature dependency of power. Power consumption in CMOS depends on mobilityfactors, threshold voltage and doping concentrations. These factors are temperaturedependent. Hence power also varies according to variation in temperature.2. Voltage dependency of power. Voltage dependency of power is well known.(P=C*V*V*f). This is true for CMOS technology also. If we model, the CMOScomponent as a capacitor, it is clear that power varies based on the variation on supplyvoltage.3. Power increases with increase in frequency of operation. In fact, many designs now aday have different modes of operation. A high frequency mode when the device isoperational and a low frequency mode when the device is in standby mode. The impactof frequency on power estimation is already being discussed in previous section.4. Now a day, most of the designs have a significant chunk of flops or registers. Accordingto one statistics, around 40-50% logic of the design contains flops. If all the flops areclocked throughout the operation, clock network consumes almost 50% of total power.It is sometimes helpful to analyze power consumption on clock network. This workanalyzes clock power contribution to total power.5. Process corner also impacts the currents and power consumption. This is especially truefor leakage power. A typical VLSI process has leakage power variation of order of 4-6from worst process to best process.44