Power Grid Analysis in VLSI Designs - SERC

3.2 Current approaches to Power AnalysisCell based power estimation consists of cell characterization and logic simulation or activityestimation. The characterization phase entails a set of electrical simulations of each library cellfor all possible input transitions and for a wide range of fanin and fanout conditions. Timingand power information obtained in this way is used to construct lookup tables for the basiclibrary elements [46][69].Summing the leakage power of the design’s constituent library cells derives the total leakagepower of a circuit:P leakageTotal = ∑∀ Cell (i)PCellLeaka ge(i) (3)Where P cellLeakage(I) is the leakage power dissipation of each cell. Technology library developersannotate the library cells with the approximate total leakage power dissipated by each cell.There is usually a single static power number per library cell but sometimes leakage power candepend on the logical condition of the cell. In this case, the library cell is annotated with a statedependent static power.A cell’s internal power is the sum of the internal power of all of the cell’s inputs and outputs asmodeled in the technology library:∑P = Ei * A(i) * f ( i)(4)Internal∀Pin(i)Where Ei is the internal energy of each pin. In practice, the internal energy if a pin ischaracterized in the technology library and can be accessed by simple table look-up. Depending42