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Power Grid Analysis in VLSI Designs - SERC

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85. Fei Li; Lei He; Saluja, K.K.; “Estimation of maximum power-up current”, DAC, pp. 51-56, Jan 200286. Calhoun, B.H.; Honore, F.A.; Chandrakasan, A.P, “A leakage reduction methodology for distributed MTCMOS”, JSSC, pp. 818-826,May 200487. Royannez, P.; Mair, H.; Dahan, F.; Wagner, M.; Streeter, M.; Bouetel, L.; Blasquez, J.; Clasen, H.; Sem<strong>in</strong>o, G.; Dong, J.; Scott, D.; Pitts,B.; Raibaut, C.; Um<strong>in</strong>g Ko, “90nm Low Leakage SoC Design Techniques for Wireless Applications”, ISSCC, pp. 138-139, Feb 2005.88. R. Heald, et al., “Implementation of a 3 rd Generation SPARC V9 64b Microprocessor,” Proc. IEEE ISSCC, pp 412-413, 200089. P. Gronowski, W. Bowhill, R. Preston, M. Gowan, and R. Allmon, “High Performance Microprocessor Design,” IEEE Journal of SolidState Circuits, vol 33, no 5, pp. 676-686, Apr 1998.90. J. Darnauer, D. Chengson, B. Schmidt, and E. Priest, “Electrical Evaluation of Flip-Chip package Alternatives for Next GenerationMicroprocessor,“ Electronic Components and Technology Conference, pp. 666-673, 199891. S. Borkar, “Low <strong>Power</strong> Design Challenges for the Decade,” Proc. of ISLPED, 200092. V. Tiwari, D. S<strong>in</strong>gh, S. Rajgopal, G. Mehta, R. Patel and F. Baez, “Reduc<strong>in</strong>g <strong>Power</strong> <strong>in</strong> High performance Microprocessors,” Proc. ofDesign Automations Conference, 199793. Wachnik, R.A.; Filippi, R.G.; Shaw, T.M.; L<strong>in</strong>, P.C, “Practical benefits of the electromigration short-length effect, <strong>in</strong>clud<strong>in</strong>g a new designrule methodology and an electromigration resistant power grid with enhanced wireability”, Sym on <strong>VLSI</strong> Technology, pp. 220-221, June2000.94. J. Kitch<strong>in</strong>, “Statistical Electromigration Budget<strong>in</strong>g for Reliable Design and Verification <strong>in</strong> a 300-MHz Microprocessor”, Symposium on<strong>VLSI</strong> Circuits Digests, pp. 115-116, 199595. T .H. Cormen, C. E. Leiserson, R. L. Rivest “Introduction to Algorithms”, PHI96. Chapra, S.C, Canale R P “Numerical Methods for Eng<strong>in</strong>eers” 3rd Ed., McGraw-Hill 1998.97. Rabey, “Digital Integrated Circuits Design”, Pearson Education, Second Edition, 2003113

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