X9221 Dual E2POT™ Nonvolatile Digital Potentiometer Terminal ...

X9221Figure 4. Three-Byte Command SequenceSCLSDASTART0 1 0 1 A3 A2 A1 A0 ACKI3 I2 I1 I0 0 P0 R1 R0 ACK0 0 D5 D4 D3 D2 D1 D0ACKSTOP3079 ILL F11Figure 5. Increment/Decrement Command SequenceSCLSDAXX0 1 0 1 A3 A2 A1 A0 I3 I2 I1 I0 0 P0 STAACKR1 R0 ACKRTINC1INC2INCnDEC1DECnSTOP3079 ILL F12Figure 6. Increment/Decrement Timing LimitsINC/DECCMDISSUEDt CLWVSCLSDAV WVOLTAGE OUT3079 ILL F135

X9221Table 1. Instruction SetInstruction FormatInstruction I 3 I 2 I 1 I 0 0 P 0 R 1 R o OperationRead WCR 1 0 0 1 0 1/0 N/A(7) N/A Read the contents of the Wiper CounterRegister pointed to by P 0Write WCR 1 0 1 0 0 1/0 N/A N/A Write new value to the Wiper CounterRegister pointed to by P 0Read Data 1 0 1 1 0 1/0 1/0 1/0 Read the contents of the RegisterRegister pointed to by P 0 and R 1 –R 0Write Data 1 1 0 0 0 1/0 1/0 1/0 Write new value to the RegisterRegister pointed to by P 0 and R 1 –R 0XFR Data Reg- 1 1 0 1 0 1/0 1/0 1/0 Transfer the contents of the Registerister to WCR pointed to by P 0 and R 1 –R 0to its associated WCRXFR WCR to 1 1 1 0 0 1/0 1/0 1/0 Transfer the contents of the WCRData Registerpointed to by P 0 to the Registerpointed to by R 1 –R 0Global XFR Data 0 0 0 1 N/A N/A 1/0 1/0 Transfer the contents of all four DataRegister to WCRRegisters pointed to by R 1 –R 0 to theirrespective WCRGlobal XFR WCR 1 0 0 0 N/A N/A 1/0 1/0 Transfer the contents of all WCRsto Data Registerto their respective data Registerspointed to by R 1 –R 0Increment/Decre- 0 0 1 0 0 1/0 N/A N/A Enable Increment/decrement of thement Wiper WCR pointed to by P 03079 PGM T11.1Notes: (7) N/A = Not applicable or don’t care; that is, a data register is not involved in the operation and need not be addressed (typical)Figure 7. Acknowledge Response from ReceiverSCL FROMMASTER1 8 9DATAOUTPUTFROMTRANSMITTERDATAOUTPUTFROMRECEIVERSTARTACKNOWLEDGE3079 ILL F146

X9221DETAILED OPERATIONBoth E2POT potentiometers share the serial interfaceand share a common architecture. Each potentiometeris comprised of a resistor array, a wiper counter registerand four data registers. A detailed discussion of theregister organization and array operation follows.Wiper Counter RegisterThe X9221 contains two wiper counter registers (WCR),one for each E2POT potentiometer. The WCR can beenvisioned as a 6-bit parallel and serial load counter withits outputs decoded to select one of sixty-four switchesalong its resistor array. The contents of the WCR can bealtered in four ways: it may be written directly by the hostvia the Write WCR instruction (serial load); it may bewritten indirectly by transferring the contents of one offour associated data registers via the XFR Data Registerinstruction (parallel load); it can be modified one step ata time by the Increment/ Decrement instruction; finally,it is loaded with the contents of its data register zero (R0)upon power-up.The WCR is a volatile register; that is, its contents arelost when the X9221 is powered-down. Although theregister is automatically loaded with the value in R0upon power-up, it should be noted this may be differentfrom the value present at power-down.Data RegistersEach potentiometer has four nonvolatile data registers.These can be read or written directly by the host anddata can be transferred between any of the four dataregisters and the WCR. It should be noted all operationschanging data in one of these registers is a nonvolatileoperation and will take a maximum of 10ms.If the application does not require storage of multiplesettings for the potentiometer, these registers can beused as regular memory locations that could possiblystore system parameters or user preference data.Figure 8. Detailed Potentiometer Block DiagramSERIAL DATA PATHFROM INTERFACECIRCUITRYSERIALBUSINPUTV HREGISTER 0 REGISTER 18 6REGISTER 2 REGISTER 3PARALLELBUSINPUTWIPERCOUNTERREGISTERCOUNTERIF WCR = 00[H] THEN VW = VLIF WCR = 3F[H] THEN VW = VHUP/DNMODIFIED SCLINC/DECLOGICUP/DNCLKDECODEV LV W3079 ILL F157

X9221ENDURANCE AND DATA RETENTIONParameter Min. UnitsMinimum Endurance 100,000 Data Changes per RegisterData Retention 100 Years3079 PGM T06.2CAPACITANCESymbol Parameter Max. Units Test ConditionsC (5) I/O Input/Output Capacitance (SDA) 8 pF V I/O = 0VC IN(5) Input Capacitance (A0, A1, A2, A3 and SCL) 6 pF V IN = 0V3079 PGM T07POWER-UP TIMINGSymbol Parameter Max. Unitst PUR(6) Power-up to Initiation of Read Operation 1 mst (6) PUW Power-up to Initiation of Write Operation 5 ms3079 PGM T08A.C. CONDITIONS OF TESTInput Pulse Levels V CC x 0.1 to V CC x 0.9Input Rise andFall Times10nsInput and OutputTiming Levels V CC x 0.53079 PGM T09Notes: (5) This parameter is periodically sampled and not 100%tested.(6) t PUR and t PUW are the delays required from the timeVCC is stable until the specified operation can beinitiated. These parameters are periodically sampledand not 100% tested.SYMBOL TABLEEQUIVALENT A.C. TEST CIRCUITSDA OUTPUTGuidelines for CalculatingTypical Values of Bus Pull-Up Resistors5V1533Ω100pF3079 ILL F02.1WAVEFORM INPUTS OUTPUTSMust besteadyMay changefrom LOW to HIGHMay changefrom HIGH to LOWDon’t Care:ChangesAllowedN/AWill besteadyWill changefrom LOWto HIGHWill changefrom HIGHto LOWChanging:State NotKnownCenter Lineis HighImpedanceRESISTANCE (KΩ)120100806040R MIN= IOL MINtR MAX= RCBUSMAX.RESISTANCEV CC MAX =1.8KΩ20MIN.RESISTANCE00 20 40 60 80 100 120BUS CAPACITANCE (pF)3079 ILL F179

X9221A.C. CHARACTERISTICS (Over recommended operating conditions unless otherwise stated)LimitsReferenceSymbol Parameter Min. Max. Units Figuref SCL SCL Clock Frequency 0 100 KHz 10t LOW Clock LOW Period 4700 ns 10t HIGH Clock HIGH Period 4000 ns 10t R SCL and SDA Rise Time 1000 ns 10t F SCL and SDA Fall Time 300 ns 10Ti Noise Suppression Time Constant 100 ns 10(Glitch Filter)t SU:STA Start Condition Setup Time (for a Repeated 4700 ns 10 & 12Start Condition)t HD:STA Start Condition Hold Time 4000 ns 10 & 12t SU:DAT Data in Setup Time 250 ns 10t HD:DAT Data in Hold Time 0 ns 10t AA SCL LOW to SDA Data Out Valid 300 3500 ns 11t DH Data Out Hold Time 300 ns 11t SU:STO Stop Condition Setup Time 4700 ns 10 & 12t BUF Bus Free Time Prior to New Transmission 4700 ns 10t WR Write Cycle Time (Nonvolatile Write Operation) 10 ms 13t STPWV Wiper Response Time From Stop Generation 1000 µs 13t CLWV Wiper Response From SCL LOW 500 µs 6t R V CC V CC Power-up Rate 0.2 50 mV/µs3079 PGM T10.3Figure 10. Input Bus Timingt HIGHt LOW t F t Rt SU:STOSCLt SU:STA t HD:STA t HD:DAT t SU:DATSDA(DATA IN)t BUF3079 ILL F0310

X9221Figure 11. Output Bus TimingSCLt AAt DHSDA SDA OUT (ACK) SDA OUT SDA OUT3079 ILL F053079 ILL F04Figure 12. Start Stop TimingSTART CONDITIONSTOP CONDITIONSCLt SU:STAt HD:STAt SU:STOSDADATA INFigure 13. Write Cycle and Wiper Response TimingSCLSDACLOCK 8CLOCK 9SDA INACKSTOPt WRSTARTt STPWVWIPEROUTPUT3079 ILL F0611

X9221PACKAGING INFORMATION20-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P1.060 (26.92)0.980 (24.89)0.280 (7.11)0.240 (6.096)PIN 1 INDEXPIN 10.900 (23.66)REF.—0.005 (0.127)SEATINGPLANE(3.81) 0.150(2.92) 0.11500.195 (4.95)0.115 (2.92)––0.015 (0.38)0.10 (BSC)(2.54)0.070 (1.778)0.045 (1.143)0.022 (0.559)0.014 (0.356)0.300(7.62) (BSC)0.014 (0.356)0.008 (0.2032)0°15°NOTE:1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH3926 FHD F18.112

X9221PACKAGING INFORMATION20-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S0.290 (7.37)0.299 (7.60)0.393 (10.00)0.420 (10.65)PIN 1 INDEXPIN 10.014 (0.35)0.020 (0.50)0.496 (12.60)0.508 (12.90)(4X) 7°0.092 (2.35)0.105 (2.65)0.050 (1.27)0.003 (0.10)0.012 (0.30)0.050" Typical0.010 (0.25)0.020 (0.50)X 45°0° – 8°0.007 (0.18)0.011 (0.28)0.420"0.050"Typical0.015 (0.40)0.050 (1.27)FOOTPRINT0.030" Typical20 PlacesNOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)3926 FHD F2313

X9221ORDERING INFORMATIONX9221 Y P T VDeviceV CC LimitsBlank = 5V ±10%Temperature RangeBlank = Commercial = 0°C to +70°CI = Industrial = –40°C to +85°CM = Military = –55°C to +125°CPackageP = 20-Lead Plastic DIPS = 20-Lead SOICPotentiometer OrganizationPot 0 Pot 1Y = 2K 2KW = 10K 10KU = 50K 50KLIMITED WARRANTYDevices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty,express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement.Xicor, Inc. makes no warranty of merchantability or fitness for any purpose. Xicor, Inc. reserves the right to discontinue production and change specifications andprices at any time and without notice.Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents, licenses areimplied.U.S. PATENTSXicor products are covered by one or more of the following U.S. Patents: 4,263,664; 4,274,012; 4,300,212; 4,314,265; 4,326,134; 4,393,481; 4,404,475;4,450,402; 4,486,769; 4,488,060; 4,520,461; 4,533,846; 4,599,706; 4,617,652; 4,668,932; 4,752,912; 4,829, 482; 4,874, 967; 4,883, 976. Foreign patents andadditional patents pending.LIFE RELATED POLICYIn situations where semiconductor component failure may endanger life, system designers using this product should design the system with appropriate errordetection and correction, redundancy and back-up features to prevent such an occurence.Xicor's products are not authorized for use in critical components in life support devices or systems.1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whosefailure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significantinjury to the user.2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety or effectiveness.14

X9221NOTES15

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