Xilinx XAPP713 Virtex-4 RocketIO Bit-Error Rate Tester, application ...

Multi-Channel XBERT ModuleRTable 10: Bit Definitions of the 32-bit Status Vector (GPIO_OUT(0:31])Address Bit Name Description0[0:7] BITS_PER_WORD[8:10] N/A Reserved11 GPIO_EN[12:15] NUM_OF_CHN[16:24] N/A Reserved25 ALIGNED26 LINK27 PMA_LOCK_TX28 PMA_LOCK_RX29 DCM_LOCKED_TX[30:31] DCM_LOCKED_RXIndicates the XBERT data width as the number of bitsin a word that transmits or receives on the multichannelXBERT module. Each word can be 16, 20,32, or 40 bits corresponding to the data width of theMGT fabric interface.Indicates the level of GPIO_EN signal on the multichannelXBERT module.1: The GPIO interface is enabled0: The GPIO interface is disabledIf ChipScope VIO core is implemented in the design,it can only be enabled when the GPIO interface isdisabled.Indicates the total number of channels implementedin the multi- channel XBERT module.Indicates the status of the comma alignment andword alignment on the selected MGT in the selectedchannel.1: Comma alignment and word alignment areachieved on the selected MGT0: Comma alignment and word alignment aredisabled or in progress on the selected MGTIndicates the link status on the selected MGT in theselected channel.1: The link is established on the selected MGT0: The link is down on the selected MGTIndicates the PMA TX lock status on the selectedMGT in the selected channel.1: The PMA TX has achieved lock0: The PMA TX has not achieved lockIndicates the PMA RX lock status on the selectedMGT in the selected channel.1: The PMA RX has achieved lock0: The PMA RX has not achieved lockIndicates the status of the MGT TX user clocks in theselected channel.1: The clock is detected and stable0: The clock is not detected or unstableIndicates the status of the MGT RX user clocks in theselected channel. Bit 30 is for MGTB. Bit 31 is forMGTA. Each bit can be:1: The clock is detected and stable0: The clock is not detected or unstablewww.BDTIC.com/XILINXXAPP713 (v1.1) April 18, 2007 www.xilinx.com 23