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AMD64 Technology 24594 Rev. 3.10 February 2005• mem32/48—Doubleword (32-bit) or 48-bit operand inmemory.• mem48—48-bit operand in memory.• mem64—Quadword (64-bit) operand in memory.• mem128—Double quadword (128-bit) operand in memory.• mem16:16—Two sequential word (16-bit) operands in memory.• mem16:32—A doubleword (32-bit) operand followed by aword (16-bit) operand in memory.• mem32real—Single-precision (32-bit) floating-point operandin memory.• mem32int—Doubleword (32-bit) integer operand in memory.• mem64real—Double-precision (64-bit) floating-point operandin memory.• mem64int—Quadword (64-bit) integer operand in memory.• mem80real—Double-extended-precision (80-bit) floatingpointoperand in memory.• mem80dec—80-bit packed BCD operand in memory, containing18 4-bit BCD digits.• mem2env—16-bit x87 control word or x87 status word.• mem14/28env—14-byte or 28-byte x87 environment. The x87environment consists of the x87 control word, x87 statusword, x87 tag word, last non-control instruction pointer, lastdata pointer, and opcode of the last non-control instructioncompleted.• mem94/108env—94-byte or 108-byte x87 environment andregister stack.• mem512env—512-byte environment for 128-bit media, 64-bitmedia, and x87 instructions.• mmx—Quadword (64-bit) operand in an MMX register.• mmx1—Quadword (64-bit) operand in an MMX register,specified as the left-most (first) operand in the instructionsyntax.• mmx2—Quadword (64-bit) operand in an MMX register,specified as the right-most (second) operand in theinstruction syntax.• mmx/mem32—Doubleword (32-bit) operand in an MMXregister or memory.44 Chapter 2: Instruction Overview
24594 Rev. 3.10 February 2005 AMD64 Technology• mmx/mem64—Quadword (64-bit) operand in an MMXregister or memory.• mmx1/mem64—Quadword (64-bit) operand in an MMXregister or memory, specified as the left-most (first) operandin the instruction syntax.• mmx2/mem64—Quadword (64-bit) operand in an MMXregister or memory, specified as the right-most (second)operand in the instruction syntax.• moffset—Direct memory offset that specifies an operand inmemory.• moffset8—Direct memory offset that specifies a byte (8-bit)operand in memory.• moffset16—Direct memory offset that specifies a word (16-bit) operand in memory.• moffset32—Direct memory offset that specifies adoubleword (32-bit) operand in memory.• moffset64—Direct memory offset that specifies a quadword(64-bit) operand in memory.• pntr16:16—Far pointer with 16-bit selector and 16-bit offset.• pntr16:32—Far pointer with 16-bit selector and 32-bit offset.• reg—Operand of unspecified size in a GPR register.• reg8—Byte (8-bit) operand in a GPR register.• reg16—Word (16-bit) operand in a GPR register.• reg16/32—Word (16-bit) or doubleword (32-bit) operand in aGPR register.• reg32—Doubleword (32-bit) operand in a GPR register.• reg64—Quadword (64-bit) operand in a GPR register.• reg/mem8—Byte (8-bit) operand in a GPR register ormemory.• reg/mem16—Word (16-bit) operand in a GPR register ormemory.• reg/mem32—Doubleword (32-bit) operand in a GPR registeror memory.• reg/mem64—Quadword (64-bit) operand in a GPR register ormemory.• rel8off—Signed 8-bit offset relative to the instructionpointer.Chapter 2: Instruction Overview 45
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