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Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 20052.3.4 64-Bit Media<strong>Instructions</strong>Registers. The 64-bit media instructions use the eight 64-bitMMX registers, as shown in Figure 2-10. These registers aremapped onto the x87 floating-point registers, <strong>and</strong> 64-bit mediainstructions write the x87 tag word in a way that prevents anx87 instruction from using MMX data.Some 64-bit media instructions also use the GPR (Figure 2-2<strong>and</strong> Figure 2-3) <strong>and</strong> the XMM registers (Figure 2-8).MMX Data Registers63 0mmx0mmx1mmx2mmx3mmx4mmx5mmx6mmx7513-327.epsFigure 2-10.64-Bit Media RegistersData Types. Figure 2-11 on page 39 shows the 64-bit media datatypes. They include floating-point <strong>and</strong> integer vectors <strong>and</strong>integer scalars. The floating-point data type, used by 3DNow!instructions, consists of a packed vector or two IEEE-754 32-bitsingle-precision data types. Unlike other kinds of floating-pointinstructions, however, the 3DNow! instructions do notgenerate floating-point exceptions. For this reason, there is noregister for reporting or controlling the status of exceptions inthe 64-bit-media instruction subset.38 Chapter 2: Instruction Overview

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