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Volume 3: General-Purpose and System Instructions - Stanford ...

Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005Control RegistersCR0CR2CR3CR4CR8<strong>System</strong>-Flags RegisterRFLAGSDebug RegistersDR0DR1DR2DR3DR6DR7Descriptor-Table RegistersGDTRIDTRLDTRExtended-Feature-Enable RegisterEFER<strong>System</strong>-Configuration RegisterSYSCFG<strong>System</strong>-Linkage RegistersSTARLSTARCSTARSFMASKFS.baseGS.baseKernelGSbaseSYSENTER_CSSYSENTER_ESPSYSENTER_EIPDebug-Extension RegistersDebugCtlMSRLastBranchFromIPLastBranchToIPLastIntFromIPLastIntToIPMemory-Typing RegistersMTRRcapMTRRdefTypeMTRRphysBasenMTRRphysMasknMTRRfixnPATTOP_MEMTOP_MEM2Performance-Monitoring RegistersTSCPerfEvtSelnPerfCtrnMachine-Check RegistersMCG_CAPMCG_STATMCG_CTLMCi_CTLMCi_STATUSMCi_ADDRMCi_MISCTask RegisterTRModel-Specific Registers513-260.epsFigure 2-6.<strong>System</strong> RegistersData Structures. Figure 2-7 on page 35 shows the system datastructures. These are created <strong>and</strong> maintained by systemsoftware for use in protected mode. A processor running inprotected mode uses these data structures to manage memory<strong>and</strong> protection, <strong>and</strong> to store program-state information when aninterrupt or task switch occurs.34 Chapter 2: Instruction Overview

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