Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 200526 Chapter 1: Instruction Formats
24594 Rev. 3.10 February 2005 AMD64 Technology2 Instruction Overview2.1 Instruction SubsetsFor easier reference, the instruction descriptions are dividedinto five instruction subsets. The following sections describethe function, mnemonic syntax, opcodes, affected flags, andpossible exceptions generated by all instructions in the AMD64architecture:• Chapter 3, “General-Purpose Instruction Reference”—Thegeneral-purpose instructions are used in basic softwareexecution. Most of these load, store, or operate on data inthe general-purpose registers (GPRs), in memory, or in both.Other instructions are used to alter sequential program flowby branching to other locations within the program or toentirely different programs.• Chapter 4, “System Instruction Reference”—The systeminstructions establish the processor operating mode, accessprocessor resources, handle program and system errors, andmanage memory.• “128-Bit Media Instruction Reference” in Volume 4—The 128-bit media instructions load, store, or operate on data locatedin the 128-bit XMM registers. These instructions define bothvector and scalar operations on floating-point and integerdata types. They include the SSE and SSE2 instructions thatoperate on the XMM registers. Some of these instructionsconvert source operands in XMM registers to destinationoperands in GPR, MMX, or x87 registers or otherwise affectXMM state.• “64-Bit Media Instruction Reference” in Volume 5—The 64-bitmedia instructions load, store, or operate on data located inthe 64-bit MMX registers. These instructions define bothvector and scalar operations on integer and floating-pointdata types. They include the legacy MMX instructions, the3DNow! instructions, and the AMD extensions to the MMXand 3DNow! instruction sets. Some of these instructionsconvert source operands in MMX registers to destinationoperands in GPR, XMM, or x87 registers or otherwise affectMMX state.Chapter 2: Instruction Overview 27
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AMD64 Technology 24594 Rev. 3.10 February 200526 Chapter 1: Instruction Formats
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