Volume 3: General-Purpose and System Instructions - Stanford ...

24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets and CPUID Feature Sets (continued)RCPSSRCRRDMSRRDPMCRDTSCRDTSCPReciprocal Scalar Single-Precision Floating-PointRotate Through CarryRightRead Model-SpecificRegisterRead Performance-Monitoring CounterRead Time-StampCounterRead Time-StampCounter and ProcessorID33033BasicRET Return from Call 3 BasicROL Rotate Left 3 BasicROR Rotate Right 3 BasicRSMRSQRTPSRSQRTSSInstructionMnemonic Description CPLResume from SystemManagement ModeReciprocal Square RootPacked Single-PrecisionFloating-PointReciprocal Square RootScalar Single-PrecisionFloating-Point3333General-PurposeSAHF Store AH into Flags 3 BasicSAL Shift Arithmetic Left 3 BasicSAR Shift Arithmetic Right 3 BasicSBB Subtract with Borrow 3 BasicInstruction Subsetand CPUID Feature Set(s) 1128-BitMediaSSESSESSE64-BitMediax87SystemRDMSR,WRMSRBasicTSCRDTSCPBasic1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Appendix D: Instruction Subsets and CPUID Feature Sets 487