Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005Table D-1.Instruction Subsets and CPUID Feature Sets (continued)InstructionInstruction Subsetand CPUID Feature Set(s) 1Mnemonic Description CPLGeneral-Purpose128-BitMedia64-BitMediax87SystemPSADBWPacked Sum of AbsoluteDifferences of Bytes intoa Word3SSE2SSE, MMXExtensionsPSHUFDPacked ShuffleDoublewords3SSE2PSHUFHWPacked Shuffle HighWords3SSE2PSHUFLWPacked Shuffle LowWords3SSE2PSHUFW Packed Shuffle Words 3SSE, MMXExtensionsPSLLDPacked Shift Left LogicalDoublewords3SSE2MMXPSLLDQPacked Shift Left LogicalDouble Quadword3SSE2PSLLQPacked Shift Left LogicalQuadwords3SSE2MMXPSLLWPacked Shift Left LogicalWords3SSE2MMXPSRADPacked Shift RightArithmetic Doublewords3SSE2MMXPSRAWPacked Shift RightArithmetic Words3SSE2MMXPSRLDPacked Shift RightLogical Doublewords3SSE2MMXPSRLDQPacked Shift RightLogical DoubleQuadword3SSE21. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.484 Appendix D: Instruction Subsets and CPUID Feature Sets
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets and CPUID Feature Sets (continued)PSRLQPSRLWPacked Shift RightLogical QuadwordsPacked Shift RightLogical Words33SSE2SSE2MMXMMXPSUBB Packed Subtract Bytes 3 SSE2 MMXPSUBDPSUBQPSUBSBPSUBSWPSUBUSBPSUBUSWPacked SubtractDoublewordsPacked SubtractQuadwordPacked Subtract SignedWith Saturation BytesPacked Subtract Signedwith Saturation WordsPacked SubtractUnsigned and SaturateBytesPacked SubtractUnsigned and SaturateWords333333SSE2SSE2SSE2SSE2SSE2SSE2MMXSSE2MMXMMXMMXMMXPSUBW Packed Subtract Words 3 SSE2 MMXPSWAPDPUNPCKHBWPUNPCKHDQPUNPCKHQDQInstructionMnemonic Description CPLPacked SwapDoublewordUnpack and InterleaveHigh BytesUnpack and InterleaveHigh DoublewordsUnpack and InterleaveHigh Quadwords3333General-PurposeInstruction Subsetand CPUID Feature Set(s) 1128-BitMediaSSE2SSE2SSE264-BitMedia3DNow!ExtensionsMMXMMXx87System1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Appendix D: Instruction Subsets and CPUID Feature Sets 485
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AMD64 Technology 24594 Rev. 3.10 February 2005Table D-1.Instruction Subsets <strong>and</strong> CPUID Feature Sets (continued)InstructionInstruction Subset<strong>and</strong> CPUID Feature Set(s) 1Mnemonic Description CPL<strong>General</strong>-<strong>Purpose</strong>128-BitMedia64-BitMediax87<strong>System</strong>PSADBWPacked Sum of AbsoluteDifferences of Bytes intoa Word3SSE2SSE, MMXExtensionsPSHUFDPacked ShuffleDoublewords3SSE2PSHUFHWPacked Shuffle HighWords3SSE2PSHUFLWPacked Shuffle LowWords3SSE2PSHUFW Packed Shuffle Words 3SSE, MMXExtensionsPSLLDPacked Shift Left LogicalDoublewords3SSE2MMXPSLLDQPacked Shift Left LogicalDouble Quadword3SSE2PSLLQPacked Shift Left LogicalQuadwords3SSE2MMXPSLLWPacked Shift Left LogicalWords3SSE2MMXPSRADPacked Shift RightArithmetic Doublewords3SSE2MMXPSRAWPacked Shift RightArithmetic Words3SSE2MMXPSRLDPacked Shift RightLogical Doublewords3SSE2MMXPSRLDQPacked Shift RightLogical DoubleQuadword3SSE21. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number <strong>and</strong> type of oper<strong>and</strong>s.484 Appendix D: Instruction Subsets <strong>and</strong> CPUID Feature Sets
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