Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005Table D-1.Instruction Subsets and CPUID Feature Sets (continued)InstructionInstruction Subsetand CPUID Feature Set(s) 1Mnemonic Description CPLGeneral-Purpose128-BitMedia64-BitMediax87SystemPFRSQIT1Packed Floating-PointReciprocal Square Root,Iteration 133DNow!PFRSQRTPacked Floating-PointReciprocal Square RootApproximation33DNow!PFSUBPacked Floating-PointSubtract33DNow!PFSUBRPacked Floating-PointSubtract Reverse33DNow!PI2FDPacked Integer toFloating-PointDoubleword Conversion33DNow!PI2FWPacked Integer ToFloating-Point WordConversion33DNow!ExtensionsPINSRW Packed Insert Word 3SSE2SSE, MMXExtensionsPMADDWDPacked Multiply Wordsand Add Doublewords3SSE2MMXPMAXSWPacked MaximumSigned Words3SSE2SSE, MMXExtensionsPMAXUBPacked MaximumUnsigned Bytes3SSE2SSE, MMXExtensionsPMINSWPacked Minimum SignedWords3SSE2SSE, MMXExtensionsPMINUBPacked MinimumUnsigned Bytes3SSE2SSE, MMXExtensionsPMOVMSKB Packed Move Mask Byte 3SSE2SSE, MMXExtensions1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.482 Appendix D: Instruction Subsets and CPUID Feature Sets
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets and CPUID Feature Sets (continued)PMULHRWPMULHUWPMULHWPMULLWPMULUDQPacked Multiply HighRounded WordPacked Multiply HighUnsigned WordPacked Multiply HighSigned WordPacked Multiply LowSigned WordPacked MultiplyUnsigned Doublewordand Store QuadwordPOP Pop Stack 3 BasicPOPA Pop All to GPR Words 3 BasicPOPADPop All to GPRDoublewords333333BasicPOPF Pop to FLAGS Word 3 BasicPOPFDPOPFQPORPREFETCHPREFETCHlevelPREFETCHWInstructionMnemonic Description CPLPop to EFLAGSDoublewordPop to RFLAGSQuadwordPacked Logical BitwiseORPrefetch L1 Data-CacheLinePrefetch Data to CacheLevel levelPrefetch L1 Data-CacheLine for Write333333General-PurposeBasicLong Mode3DNow!,Long ModeSSE, MMXExtensions3DNow!, LongModeInstruction Subsetand CPUID Feature Set(s) 1128-BitMediaSSE2SSE2SSE2SSE2SSE264-BitMedia3DNow!SSE, MMXExtensionsMMXMMXSSE2MMXx87System1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Appendix D: Instruction Subsets and CPUID Feature Sets 483
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24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets <strong>and</strong> CPUID Feature Sets (continued)PMULHRWPMULHUWPMULHWPMULLWPMULUDQPacked Multiply HighRounded WordPacked Multiply HighUnsigned WordPacked Multiply HighSigned WordPacked Multiply LowSigned WordPacked MultiplyUnsigned Doubleword<strong>and</strong> Store QuadwordPOP Pop Stack 3 BasicPOPA Pop All to GPR Words 3 BasicPOPADPop All to GPRDoublewords333333BasicPOPF Pop to FLAGS Word 3 BasicPOPFDPOPFQPORPREFETCHPREFETCHlevelPREFETCHWInstructionMnemonic Description CPLPop to EFLAGSDoublewordPop to RFLAGSQuadwordPacked Logical BitwiseORPrefetch L1 Data-CacheLinePrefetch Data to CacheLevel levelPrefetch L1 Data-CacheLine for Write333333<strong>General</strong>-<strong>Purpose</strong>BasicLong Mode3DNow!,Long ModeSSE, MMXExtensions3DNow!, LongModeInstruction Subset<strong>and</strong> CPUID Feature Set(s) 1128-BitMediaSSE2SSE2SSE2SSE2SSE264-BitMedia3DNow!SSE, MMXExtensionsMMXMMXSSE2MMXx87<strong>System</strong>1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number <strong>and</strong> type of oper<strong>and</strong>s.Appendix D: Instruction Subsets <strong>and</strong> CPUID Feature Sets 483
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