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Volume 3: General-Purpose and System Instructions - Stanford ...

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24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets <strong>and</strong> CPUID Feature Sets (continued)OUTSDOutput StringDoubleword3BasicOUTSW Output String Word 3 BasicPACKSSDWPACKSSWBPACKUSWBPack with SaturationSigned Doubleword toWordPack with SaturationSigned Word to BytePack with SaturationSigned Word toUnsigned Byte333SSE2SSE2SSE2MMXMMXMMXPADDB Packed Add Bytes 3 SSE2 MMXPADDDPacked AddDoublewords3SSE2MMXPADDQ Packed Add Quadwords 3 SSE2 SSE2PADDSBPADDSWPADDUSBPADDUSWPacked Add Signed withSaturation BytesPacked Add Signed withSaturation WordsPacked Add Unsignedwith Saturation BytesPacked Add Unsignedwith Saturation Words3333SSE2SSE2SSE2SSE2MMXMMXMMXMMXPADDW Packed Add Words 3 SSE2 MMXPANDPANDNInstructionMnemonic Description CPLPacked Logical BitwiseANDPacked Logical BitwiseAND NOT33<strong>General</strong>-<strong>Purpose</strong>Instruction Subset<strong>and</strong> CPUID Feature Set(s) 1128-BitMediaSSE2SSE264-BitMediaMMXMMXx87<strong>System</strong>1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number <strong>and</strong> type of oper<strong>and</strong>s.Appendix D: Instruction Subsets <strong>and</strong> CPUID Feature Sets 479

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