Volume 3: General-Purpose and System Instructions - Stanford ...

Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005Table D-1.Instruction Subsets and CPUID Feature Sets (continued)INSD Input String Doubleword 3 BasicINSW Input String Word 3 BasicINT Interrupt to Vector 3 BasicINT 3INTOInterrupt to DebugVectorInterrupt to OverflowVector3 Basic3 BasicINVD Invalidate Caches 0 BasicINVLPG Invalidate TLB Entry 0 BasicIRET Interrupt Return Word 3 BasicIRETDIRETQInterrupt ReturnDoublewordInterrupt ReturnQuadwordJcc Jump Condition 3 BasicJCXZ Jump if CX Zero 3 BasicJECXZ Jump if ECX Zero 3 BasicJMP Jump 3 BasicJRCXZ Jump if RCX Zero 3 BasicLAHFLoad Status Flags intoAH Register333BasicBasicLongModeLAR Load Access Rights Byte 3 BasicLDDQULDMXCSRInstructionMnemonic Description CPLLoad Unaligned DoubleQuadwordLoad MXCSRControl/Status Register33General-PurposeInstruction Subsetand CPUID Feature Set(s) 1128-BitMediaSSE3SSE64-BitMedia1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.x87System472 Appendix D: Instruction Subsets and CPUID Feature Sets

24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets and CPUID Feature Sets (continued)LDS Load DS Far Pointer 3 BasicLEA Load Effective Address 3 BasicLEAVEDelete Procedure StackFrame3BasicLES Load ES Far Pointer 3 BasicLFENCE Load Fence 3 SSE2LFS Load FS Far Pointer 3 BasicLGDTLoad Global DescriptorTable RegisterLGS Load GS Far Pointer 3 BasicLIDTLLDTLMSWInstructionMnemonic Description CPLLoad InterruptDescriptor Table RegisterLoad Local DescriptorTable RegisterLoad Machine StatusWordLODS Load String 3 BasicLODSB Load String Byte 3 BasicLODSD Load String Doubleword 3 BasicLODSQ Load String Quadword 3 Long ModeLODSW Load String Word 3 BasicLOOP Loop 3 BasicLOOPE Loop if Equal 3 BasicLOOPNE Loop if Not Equal 3 BasicLOOPNZ Loop if Not Zero 3 Basic0000General-PurposeInstruction Subsetand CPUID Feature Set(s) 1128-BitMedia64-BitMediax87SystemBasicBasicBasicBasic1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Appendix D: Instruction Subsets and CPUID Feature Sets 473

24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets <strong>and</strong> CPUID Feature Sets (continued)LDS Load DS Far Pointer 3 BasicLEA Load Effective Address 3 BasicLEAVEDelete Procedure StackFrame3BasicLES Load ES Far Pointer 3 BasicLFENCE Load Fence 3 SSE2LFS Load FS Far Pointer 3 BasicLGDTLoad Global DescriptorTable RegisterLGS Load GS Far Pointer 3 BasicLIDTLLDTLMSWInstructionMnemonic Description CPLLoad InterruptDescriptor Table RegisterLoad Local DescriptorTable RegisterLoad Machine StatusWordLODS Load String 3 BasicLODSB Load String Byte 3 BasicLODSD Load String Doubleword 3 BasicLODSQ Load String Quadword 3 Long ModeLODSW Load String Word 3 BasicLOOP Loop 3 BasicLOOPE Loop if Equal 3 BasicLOOPNE Loop if Not Equal 3 BasicLOOPNZ Loop if Not Zero 3 Basic0000<strong>General</strong>-<strong>Purpose</strong>Instruction Subset<strong>and</strong> CPUID Feature Set(s) 1128-BitMedia64-BitMediax87<strong>System</strong>BasicBasicBasicBasic1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number <strong>and</strong> type of oper<strong>and</strong>s.Appendix D: Instruction Subsets <strong>and</strong> CPUID Feature Sets 473

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