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Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005Case 1: Register-Register Addressing (No Memory Oper<strong>and</strong>)ModRM ByteREX PrefixOpcode mod reg r/m4WRXB11 rrr bbbREX.X is not used44Rrrr BbbbCase 2: Memory Addressing Without an SIB ByteModRM ByteREX PrefixOpcode mod reg r/m4WRXB!11 rrr bbbREX.X is not usedModRM reg field != 1004Rrrr4BbbbCase 3: Memory Addressing With an SIB ByteModRM ByteREX PrefixOpcode mod reg r/m4WRXB!11 rrr 100SIB Bytescale index basebb xxx bbb4Rrrr4Xxxx4BbbbCase 4: Register Oper<strong>and</strong> Coded in Opcode ByteREX Prefix4WRXBOpcode Byteop regbbbREX.R is not usedREX.X is not used4Bbbb513-302.epsFigure 1-3.Encoding Examples of REX-Prefix R, X, <strong>and</strong> B Bits18 Chapter 1: Instruction Formats

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