Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005Table B-5.Instructions Defaulting to 64-Bit Operand Size (continued)MnemonicThe 64-bit default operand size can be overridden to 16 bitsusing the 66h operand-size override. However, it is not possibleto override the operand size to 32 bits because there is no 32-bitoperand-size override prefix for 64-bit mode. See “Operand-Size Override Prefix” on page 5 for details.B.5 Single-Byte INC and DEC Instructions in 64-Bit ModeB.6 NOP in 64-Bit ModePUSH GS 0F A8 yesPUSHF, PUSHFD,PUSHFQOpcode(hex)9CImplicitlyReferenceRSPPush GS Segment Register ontoStackIn 64-bit mode, the legacy encodings for the 16 single-byte INCand DEC instructions (one for each of the eight GPRs) are usedto encode the REX prefix values, as described in “REXPrefixes” on page 14. Therefore, these single-byte opcodes forINC and DEC are not available in 64-bit mode, although theyare available in legacy and compatibility modes. Thefunctionality of these INC and DEC instructions is stillavailable in 64-bit mode, however, using the ModRM forms ofthose instructions (opcodes FF/0 and FF/1).Programs written for the legacy x86 architecture commonly useopcode 90h (the XCHG EAX, EAX instruction) as a one-byteNOP. In 64-bit mode, the processor treats opcode 90h speciallyin order to preserve this legacy NOP use. Without specialhandling in 64-bit mode, the instruction would not be a true nooperation.Therefore, in 64-bit mode the processor treats XCHGEAX, EAX as a true NOP, regardless of operand size.This special handling does not apply to the two-byte ModRMform of the XCHG instruction. Unless a 64-bit operand size isspecified using a REX prefix byte, using the two byte form of448 Appendix B: General-Purpose Instructions in 64-Bit ModeyesDescriptionPush rFLAGS Word,Doubleword, or Quadwordonto StackRET C2, C3 yes Return From Call (near)
24594 Rev. 3.10 February 2005 AMD64 TechnologyXCHG to exchange a register with itself will not result in a nooperationbecause the default operation size is 32 bits in 64-bitmode.B.7 Segment Override Prefixes in 64-Bit ModeIn 64-bit mode, the CS, DS, ES, SS segment-override prefixeshave no effect. These four prefixes are no longer treated assegment-override prefixes in the context of multiple-prefixrules. Instead, they are treated as null prefixes.The FS and GS segment-override prefixes are treated as truesegment-override prefixes in 64-bit mode. Use of the FS and GSprefixes cause their respective segment bases to be added tothe effective address calculation. See “FS and GS Registers in64-Bit Mode” in Volume 2 for details.Appendix B: General-Purpose Instructions in 64-Bit Mode 449
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AMD64 Technology 24594 Rev. 3.10 February 2005Table B-5.<strong>Instructions</strong> Defaulting to 64-Bit Oper<strong>and</strong> Size (continued)MnemonicThe 64-bit default oper<strong>and</strong> size can be overridden to 16 bitsusing the 66h oper<strong>and</strong>-size override. However, it is not possibleto override the oper<strong>and</strong> size to 32 bits because there is no 32-bitoper<strong>and</strong>-size override prefix for 64-bit mode. See “Oper<strong>and</strong>-Size Override Prefix” on page 5 for details.B.5 Single-Byte INC <strong>and</strong> DEC <strong>Instructions</strong> in 64-Bit ModeB.6 NOP in 64-Bit ModePUSH GS 0F A8 yesPUSHF, PUSHFD,PUSHFQOpcode(hex)9CImplicitlyReferenceRSPPush GS Segment Register ontoStackIn 64-bit mode, the legacy encodings for the 16 single-byte INC<strong>and</strong> DEC instructions (one for each of the eight GPRs) are usedto encode the REX prefix values, as described in “REXPrefixes” on page 14. Therefore, these single-byte opcodes forINC <strong>and</strong> DEC are not available in 64-bit mode, although theyare available in legacy <strong>and</strong> compatibility modes. Thefunctionality of these INC <strong>and</strong> DEC instructions is stillavailable in 64-bit mode, however, using the ModRM forms ofthose instructions (opcodes FF/0 <strong>and</strong> FF/1).Programs written for the legacy x86 architecture commonly useopcode 90h (the XCHG EAX, EAX instruction) as a one-byteNOP. In 64-bit mode, the processor treats opcode 90h speciallyin order to preserve this legacy NOP use. Without specialh<strong>and</strong>ling in 64-bit mode, the instruction would not be a true nooperation.Therefore, in 64-bit mode the processor treats XCHGEAX, EAX as a true NOP, regardless of oper<strong>and</strong> size.This special h<strong>and</strong>ling does not apply to the two-byte ModRMform of the XCHG instruction. Unless a 64-bit oper<strong>and</strong> size isspecified using a REX prefix byte, using the two byte form of448 Appendix B: <strong>General</strong>-<strong>Purpose</strong> <strong>Instructions</strong> in 64-Bit ModeyesDescriptionPush rFLAGS Word,Doubleword, or Quadwordonto StackRET C2, C3 yes Return From Call (near)
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