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AMD64 Technology 24594 Rev. 3.10 February 2005Table B-1.Operations and Operands in 64-Bit Mode (continued)Instruction andOpcode (hex) 1Type ofOperation 2DefaultOperandSize 3For 32-BitOperand Size 4For 64-BitOperand Size 4NEG—Negate Two’s ComplementF7 /3Promoted to64 bits.32 bitsZero-extends 32-bit register resultsto 64 bits.NOP—No Operation90Same aslegacy mode.Not relevant.No GPR register results.NOT—Negate One’s ComplementF7 /2Promoted to64 bits.32 bitsZero-extends 32-bit register resultsto 64 bits.OR—Logical OR090B0DPromoted to64 bits.32 bitsZero-extends 32-bit register resultsto 64 bits.81 /183 /1OUT—Output to PortE7EFSame aslegacy mode.32 bits No GPR register results.OUTS, OUTSW, OUTSD—Output String6FSame aslegacy mode.32 bitsWrites doubleword to I/O port.No GPR register results.See footnote 5Note:1. See “General Rules for 64-Bit Mode” on page 413, for opcodes that do not appear in this table.2. The type of operation, excluding considerations of operand size or extension of results. See “General Rules for 64-Bit Mode” onpage 413 for definitions of “Promoted to 64 bits” and related topics.3. If “Type of Operation” is 64 bits, a REX prefix is needed for 64-bit operand size, unless the instruction size defaults to 64 bits. Ifthe operand size is fixed, operand-size overrides are silently ignored.4. Special actions in 64-bit mode, in addition to legacy-mode actions. Zero or sign extensions apply only to result operands, notsource operands. Unless otherwise stated, 8-bit and 16-bit results leave the high 56 or 48 bits, respectively, of 64-bit destinationregisters unchanged. Immediates and branch displacements are sign-extended to 64 bits.5. Any pointer registers (rDI, rSI) or count registers (rCX) are address-sized and default to 64 bits. For 32-bit address size, any pointerand count registers are zero-extended to 64 bits.6. The default operand size can be overridden to 16 bits with 66h prefix, but there is no 32-bit operand-size override in 64-bit mode.432 Appendix B: General-Purpose Instructions in 64-Bit Mode
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable B-1.Operations and Operands in 64-Bit Mode (continued)POP—Pop Stack8F /058 through 5FPOP—Pop (segment register from) Stack0F A1 (POP FS)0F A9 (POP GS)1F (POP DS)07 (POP ES)17 (POP SS)POPA, POPAD - Pop All to GPR Words orDoublewords61POPF, POPFD, POPFQ—Pop to rFLAGSWord, Doublword, or Quadword9DPREFETCH—Prefetch L1 Data-Cache Line0F 0D /0Instruction andOpcode (hex) 1Type ofOperation 2Promoted to64 bits.Same aslegacy mode.Promoted to64 bits.Same aslegacy mode.DefaultOperandSize 364 bits Cannot encode 6 No GPR registerresults.64 bits Cannot encode 6 No GPR registerresults.INVALID IN 64-BIT MODE (invalid-opcode exception)INVALID IN 64-BIT MODE (invalid-opcode exception)64 bits Cannot encode 6 POPFQ (newmnemonic): Pops64 bits off stack,writes low 32 bitsinto EFLAGS andzero-extends thehigh 32 bits ofRFLAGS.Not relevant.For 32-BitOperand Size 4No GPR register results.For 64-BitOperand Size 4Note:1. See “General Rules for 64-Bit Mode” on page 413, for opcodes that do not appear in this table.2. The type of operation, excluding considerations of operand size or extension of results. See “General Rules for 64-Bit Mode” onpage 413 for definitions of “Promoted to 64 bits” and related topics.3. If “Type of Operation” is 64 bits, a REX prefix is needed for 64-bit operand size, unless the instruction size defaults to 64 bits. Ifthe operand size is fixed, operand-size overrides are silently ignored.4. Special actions in 64-bit mode, in addition to legacy-mode actions. Zero or sign extensions apply only to result operands, notsource operands. Unless otherwise stated, 8-bit and 16-bit results leave the high 56 or 48 bits, respectively, of 64-bit destinationregisters unchanged. Immediates and branch displacements are sign-extended to 64 bits.5. Any pointer registers (rDI, rSI) or count registers (rCX) are address-sized and default to 64 bits. For 32-bit address size, any pointerand count registers are zero-extended to 64 bits.6. The default operand size can be overridden to 16 bits with 66h prefix, but there is no 32-bit operand-size override in 64-bit mode.Appendix B: General-Purpose Instructions in 64-Bit Mode 433
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