Volume 3: General-Purpose and System Instructions - Stanford ...

24594 Rev. 3.10 February 2005 AMD64 TechnologyTable B-1.Operations and Operands in 64-Bit Mode (continued)Instruction andOpcode (hex) 1Type ofOperation 2DefaultOperandSize 3For 32-BitOperand Size 4For 64-BitOperand Size 4LIDT—Load Interrupt Descriptor TableRegister0F 01 /3Promoted to64 bits.Operand sizefixed at 64bits.No GPR register results.Loads 8-byte base and 2-byte limit.LLDT—Load Local Descriptor Table Register0F 00 /2Promoted to64 bits.Operand sizefixed at 16bits.No GPR register results.References 16-byte descriptor to load64-bit base.LMSW—Load Machine Status Word0F 01 /6Same aslegacy mode.Operand sizefixed at 16bits.No GPR register results.LODS, LODSW, LODSD, LODSQ—LoadStringADPromoted to64 bits.32 bitsLODSD: LoadStringDoublewords.Zero-extends 32-bit register resultsto 64 bits.See footnote 5LODSQ (newmnemonic): LoadStringQuadwords.See footnote 5LOOP—LoopE2LOOPZ, LOOPE—Loop if Zero/EqualE1LOOPNZ, LOOPNE—Loop if NotZero/EqualE0Promoted to64 bits.64 bits Can’t encode. 6 RIP = RIP + 8-bitdisplacementsign-extended to64 bits.See footnote 5Note:1. See “General Rules for 64-Bit Mode” on page 413, for opcodes that do not appear in this table.2. The type of operation, excluding considerations of operand size or extension of results. See “General Rules for 64-Bit Mode” onpage 413 for definitions of “Promoted to 64 bits” and related topics.3. If “Type of Operation” is 64 bits, a REX prefix is needed for 64-bit operand size, unless the instruction size defaults to 64 bits. Ifthe operand size is fixed, operand-size overrides are silently ignored.4. Special actions in 64-bit mode, in addition to legacy-mode actions. Zero or sign extensions apply only to result operands, notsource operands. Unless otherwise stated, 8-bit and 16-bit results leave the high 56 or 48 bits, respectively, of 64-bit destinationregisters unchanged. Immediates and branch displacements are sign-extended to 64 bits.5. Any pointer registers (rDI, rSI) or count registers (rCX) are address-sized and default to 64 bits. For 32-bit address size, any pointerand count registers are zero-extended to 64 bits.6. The default operand size can be overridden to 16 bits with 66h prefix, but there is no 32-bit operand-size override in 64-bit mode.Appendix B: General-Purpose Instructions in 64-Bit Mode 427