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AMD64 Technology 24594 Rev. 3.10 February 2005Table A-13.ModRM Memory References, 16-Bit Addressing[BX+SI]Effective Address 1ModRMmodField(binary)ModRM reg Field 2/0 /1 /2 /3 /4 /5 /6 /7Complete ModRM Byte (hex)ModRMr/mField(binary)00 08 10 18 20 28 30 38 000[BX+DI] 01 09 11 19 21 29 31 39 001[BP+SI] 02 0A 12 1A 22 2A 32 3A 010[BP+DI] 03 0B 13 1B 23 2B 33 3B 01100[SI] 04 0C 14 1C 24 2C 34 3C 100[DI] 05 0D 15 1D 25 2D 35 3D 101[disp16] 06 0E 16 1E 26 2E 36 3E 110[BX] 07 0F 17 1F 27 2F 37 3F 111[BX+SI+disp8]40 48 50 58 60 68 70 78 000[BX+DI+disp8] 41 49 51 59 61 69 71 79 001[BP+SI+disp8] 42 4A 52 5A 62 6A 72 7A 010[BP+DI+disp8] 43 4B 53 5B 63 6B 73 7B 01101[SI+disp8] 44 4C 54 5C 64 6C 74 7C 100[DI+disp8] 45 4D 55 5D 65 6D 75 7D 101[BP+disp8] 46 4E 56 5E 66 6E 76 7E 110[BX+disp8] 47 4F 57 5F 67 6F 77 7F 111[BX+SI+disp16]80 88 90 98 A0 A8 B0 B8 000[BX+DI+disp16] 81 89 91 99 A1 A9 B1 B9 001[BP+SI+disp16] 82 8A 92 9A A2 AA B2 BA 010[BP+DI+disp16] 83 8B 93 9B A3 AB B3 BB 01110[SI+disp16] 84 8C 94 9C A4 AC B4 BC 100[DI+disp16] 85 8D 95 9D A5 AD B5 BD 101[BP+disp16] 86 8E 96 9E A6 AE B6 BE 110[BX+disp16] 87 8F 97 9F A7 AF B7 BF 111Note:1. In these combinations, “disp8” and “disp16” indicate an 8-bit or 16-bit signed displacement.2. See Table A-12 for complete specification of ModRM “reg” field.404 Appendix A: Opcode and Operand Encodings
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable A-13.ModRM Memory References, 16-Bit Addressing (continued)AL/AX/EAX/MMX0/XMM0Effective Address 1ModRMmodField(binary)ModRM reg Field 2/0 /1 /2 /3 /4 /5 /6 /7Complete ModRM Byte (hex)C0 C8 D0 D8 E0 E8 F0 F8 000CL/CX/ECX/MMX1/XMM1 C1 C9 D1 D9 E1 E9 F1 F9 001DL/DX/EDX/MMX2/XMM2 C2 CA D2 DA E2 EA F2 FA 010BL/BX/EBX/MMX3/XMM3 C3 CB D3 DB E3 EB F3 FB 01111AH/SP/ESP/MMX4/XMM4 C4 CC D4 DC E4 EC F4 FC 100CH/BP/EBP/MMX5/XMM5 C5 CD D5 DD E5 ED F5 FD 101DH/SI/ESI/MMX6/XMM6 C6 CE D6 DE E6 EE F6 FE 110BH/DI/EDI/MMX7/XMM7 C7 CF D7 DF E7 EF F7 FF 111Note:1. In these combinations, “disp8” and “disp16” indicate an 8-bit or 16-bit signed displacement.2. See Table A-12 for complete specification of ModRM “reg” field.ModRMr/mField(binary)Register and Memory References for 32-Bit and 64-Bit Addressing.Table A-14 on page 406 shows the encoding for 32-bit and 64-bitregister references using the ModRM reg field. The first ninerows of Table A-14 show references when the REX.R bit iscleared to 0, and the last nine rows show references when theREX.R bit is set to 1. In this table, Mnemonic Notation meansthe syntax notation shown in “Mnemonic Syntax” on page 43for a register, and ModRM Notation (/r) means the opcodesyntaxnotation shown in “Opcode Syntax” on page 46 for theregister.Table A-15 on page 407 shows the encoding for 32-bit and 64-bitmemory references using the ModRM byte. This table describes32-bit and 64-bit addressing, with the REX.B bit set or cleared.The Effective Address is shown in the two left-most columns,followed by the binary encoding of the ModRM-byte mod field,followed by the eight possible hex values of the completeModRM byte (one value for each binary encoding of theModRM-byte reg field), followed by the binary encoding of theModRM r/m field.The /0 through /7 notation for the ModRM reg field (bits 5–3)means that the three-bit field contains a value from zero (binary000) to 7 (binary 111).Appendix A: Opcode and Operand Encodings 405
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