Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005A.2.8 rFLAGSCondition Codes forx87 OpcodesTable A-11 shows the rFLAGS condition codes specified by theopcode and ModRM bytes of the FCMOVcc instructions.Table A-11.rFLAGS Condition Codes for FCMOVccOpcode(hex)DADBModRMmodField11ModRMregFieldrFLAGS Value cc Mnemonic Condition000 CF = 1 B Below001 ZF = 1 E Equal010 CF = 1 or ZF = 1 BE Below or Equal011 PF = 1 U Unordered000 CF = 0 NB Not Below001 ZF = 0 NE Not Equal010 CF = 0 and ZF = 0 NBE Not Below or Equal011 PF = 0 NU Not UnorderedA.3 Operand EncodingsRegister and memory operands are encoded using the moderegister-memory(ModRM) and the scale-index-base (SIB) bytesthat follow the opcodes. In some instructions, the ModRM byteis followed by an SIB byte, which defines the instruction’smemory-addressing mode for the complex-addressing modes.A.3.1 ModRMOperand ReferencesFigure A-2 on page 403 shows the format of a ModRM byte.There are three fields—mod, reg, and r/m. The reg field not onlyprovides additional opcode bits—as described above beginningwith “ModRM Extensions to One-Byte and Two-Byte Opcodes”on page 387 and ending with “x87 Encodings” on page 392—but is also used with the other two fields to specify operands.The mod and r/m fields are used together with each other and,in 64-bit mode, with the REX.R and REX.B bits of the REXprefix, to specify the location of the instruction’s operands andcertain of the possible addressing modes (specifically, the noncomplexmodes).402 Appendix A: Opcode and Operand Encodings
24594 Rev. 3.10 February 2005 AMD64 TechnologyBits:76543210modreg r/m ModRMREX.R bit of REX prefix canextend this field to 4 bitsREX.B bit of REX prefix canextend this field to 4 bits513-305.epsFigure A-2.ModRM-Byte FormatThe two sections below describe the ModRM operandencodings, first for 32-bit and 64-bit references, and then for 16-bit references.16-Bit Register and Memory References. Table A-12 shows thenotation and encoding conventions for register references usingthe ModRM reg field. This table is comparable to Table A-14 onpage 406 but applies only when the address-size is 16-bit.Table A-13 on page 404 shows the notation and encodingconventions for 16-bit memory references using the ModRMbyte. This table is comparable to Table A-15 on page 407.Table A-12.ModRM Register References, 16-Bit AddressingMnemonicNotationModRM reg Field/0 /1 /2 /3 /4 /5 /6 /7reg8 AL CL DL BL AH CH DH BHreg16 AX CX DX BX SP BP SI DIreg32 EAX ECX EDX EBX ESP EBP ESI EDImmx MMX0 MMX1 MMX2 MMX3 MMX4 MMX5 MMX6 MMX7xmm XMM0 XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7sReg ES CS SS DS FS GS iinvalid invalidcReg CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7dReg DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7Appendix A: Opcode and Operand Encodings 403
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AMD64 Technology 24594 Rev. 3.10 February 2005A.2.8 rFLAGSCondition Codes forx87 OpcodesTable A-11 shows the rFLAGS condition codes specified by theopcode <strong>and</strong> ModRM bytes of the FCMOVcc instructions.Table A-11.rFLAGS Condition Codes for FCMOVccOpcode(hex)DADBModRMmodField11ModRMregFieldrFLAGS Value cc Mnemonic Condition000 CF = 1 B Below001 ZF = 1 E Equal010 CF = 1 or ZF = 1 BE Below or Equal011 PF = 1 U Unordered000 CF = 0 NB Not Below001 ZF = 0 NE Not Equal010 CF = 0 <strong>and</strong> ZF = 0 NBE Not Below or Equal011 PF = 0 NU Not UnorderedA.3 Oper<strong>and</strong> EncodingsRegister <strong>and</strong> memory oper<strong>and</strong>s are encoded using the moderegister-memory(ModRM) <strong>and</strong> the scale-index-base (SIB) bytesthat follow the opcodes. In some instructions, the ModRM byteis followed by an SIB byte, which defines the instruction’smemory-addressing mode for the complex-addressing modes.A.3.1 ModRMOper<strong>and</strong> ReferencesFigure A-2 on page 403 shows the format of a ModRM byte.There are three fields—mod, reg, <strong>and</strong> r/m. The reg field not onlyprovides additional opcode bits—as described above beginningwith “ModRM Extensions to One-Byte <strong>and</strong> Two-Byte Opcodes”on page 387 <strong>and</strong> ending with “x87 Encodings” on page 392—but is also used with the other two fields to specify oper<strong>and</strong>s.The mod <strong>and</strong> r/m fields are used together with each other <strong>and</strong>,in 64-bit mode, with the REX.R <strong>and</strong> REX.B bits of the REXprefix, to specify the location of the instruction’s oper<strong>and</strong>s <strong>and</strong>certain of the possible addressing modes (specifically, the noncomplexmodes).402 Appendix A: Opcode <strong>and</strong> Oper<strong>and</strong> Encodings
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