Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005A.2.3 rFLAGSCondition Codes forTwo-Byte OpcodesTable A-5 shows the rFLAGS condition codes specified by thelow nibble in the second opcode byte of the CMOVcc, Jcc, andSETcc instructions.Table A-5.rFLAGS Condition Codes for CMOVcc, Jcc, and SETccLow Nibble ofSecond OpcodeByte (hex)rFLAGS Valuecc MnemonicArithmeticTypeCondition(s)0 OF= 1 OOverflowSigned1 OF= 0 NO No Overflow2 CF= 1 B, C, NAEBelow, Carry, Not Above or Equal3 CF = 0 NB, NC, AE Not Below, No Carry, Above or Equal4 ZF = 1 Z, E Zero, EqualUnsigned5 ZF = 0 NZ, NE Not Zero, Not Equal6 CF = 1 or ZF = 1 BE, NA Below or Equal, Not Above7 CF = 0 and ZF = 0 NBE, A Not Below or Equal, Above8 SF =1 SSignSigned9 SF = 0 NS Not SignA PF= 1 P, PEParity, Parity Evenn/aB PF = 0 NP, PO Not Parity, Parity OddC (SF xor OF) =1 L, NGESignedLess than, Not Greater than or Equal toD (SF xor OF) = 0 NL, GE Not Less than, Greater than or Equal toEF(SF xor OF) = 1or ZF = 1(SF xor OF) = 0and ZF = 0LE, NGNLE, GLess than or Equal to, Not Greater thanNot Less than or Equal to, Greater than386 Appendix A: Opcode and Operand Encodings
24594 Rev. 3.10 February 2005 AMD64 TechnologyA.2.4 ModRMExtensions to One-Byte and Two-ByteOpcodesThe ModRM byte, which immediately follows the last opcodebyte, is used in certain instruction encodings to provideadditional opcode bits with which to define the function of theinstruction. ModRM bytes have three fields—mod, reg, and r/m,as shown in Figure A-1.Bits:7 6 5 4 3 2 1 0mod reg r/m ModRM513-325.epsFigure A-1.ModRM-Byte FieldsIn most cases, the reg field (bits 5–3) provides the additionalbits with which to extend the encodings of the first one or twoopcode bytes. In the case of the x87 floating-point instructions,the entire ModRM byte is used to extend the opcode encodings.Table A-6 on page 388 shows how the ModRM reg field is used toextend the range of one-byte and two-byte opcodes. The opcoderanges are organized into groups of opcode extensions. Thegroup number is shown in the left-most column of Table A-6.These groups are referenced in the opcodes shown in Table A-1on page 378 through Table A-4 on page 383. An entry of “n.a.”in the Prefix column means that prefixes are not applicable tothe opcodes in that row. Prefixes only apply to certain 128-bitmedia, 64-bit media, and a few other instructions introducedwith the SSE or SSE2 technologies.The /0 through /7 notation for the ModRM reg field (bits 5–3)means that the three-bit field contains a value from zero (binary000) to 7 (binary 111).Appendix A: Opcode and Operand Encodings 387
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AMD64 Technology 24594 Rev. 3.10 February 2005A.2.3 rFLAGSCondition Codes forTwo-Byte OpcodesTable A-5 shows the rFLAGS condition codes specified by thelow nibble in the second opcode byte of the CMOVcc, Jcc, <strong>and</strong>SETcc instructions.Table A-5.rFLAGS Condition Codes for CMOVcc, Jcc, <strong>and</strong> SETccLow Nibble ofSecond OpcodeByte (hex)rFLAGS Valuecc MnemonicArithmeticTypeCondition(s)0 OF= 1 OOverflowSigned1 OF= 0 NO No Overflow2 CF= 1 B, C, NAEBelow, Carry, Not Above or Equal3 CF = 0 NB, NC, AE Not Below, No Carry, Above or Equal4 ZF = 1 Z, E Zero, EqualUnsigned5 ZF = 0 NZ, NE Not Zero, Not Equal6 CF = 1 or ZF = 1 BE, NA Below or Equal, Not Above7 CF = 0 <strong>and</strong> ZF = 0 NBE, A Not Below or Equal, Above8 SF =1 SSignSigned9 SF = 0 NS Not SignA PF= 1 P, PEParity, Parity Evenn/aB PF = 0 NP, PO Not Parity, Parity OddC (SF xor OF) =1 L, NGESignedLess than, Not Greater than or Equal toD (SF xor OF) = 0 NL, GE Not Less than, Greater than or Equal toEF(SF xor OF) = 1or ZF = 1(SF xor OF) = 0<strong>and</strong> ZF = 0LE, NGNLE, GLess than or Equal to, Not Greater thanNot Less than or Equal to, Greater than386 Appendix A: Opcode <strong>and</strong> Oper<strong>and</strong> Encodings
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