Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005Related InstructionsSYSCALL, SYSEXIT, SYSRETrFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptions0 021 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, and 1 are reserved. A flag set to one or zero is M (modified). Unaffected flags are blank. Undefined flagsare U.Exception RealInvalid opcode, #UD X X XVirtual8086 Protected Cause of ExceptionThe SYSENTER and SYSEXIT instructions are notsupported, as indicated by EDX bit 11 returned by CPUIDstandard function 1.General protection, #GPXXThis instruction is not recognized in long mode.This instruction is not recognized in real mode.XXMSR_SYSENTER_CS was cleared to 0.360 SYSENTER
24594 Rev. 3.10 February 2005 AMD64 TechnologySYSEXITSystem ReturnReturns from the operating system to an application. It is a low-latency system returninstruction designed for use by system and application software implementing a flatsegmentmemory model.This is a privileged instruction. The current privilege level must be zero to executethis instruction. An invalid-opcode exception occurs if this instruction is used in longmode. Software should use the SYSRET (and SYSCALL) instructions when running inlong mode.When a system procedure performs a SYSEXIT back to application software, the CSselector is updated to point to the second descriptor entry after the SYSENTER CSvalue (MSR SYSENTER_CS+16). The SS selector is updated to point to the thirddescriptor entry after the SYSENTER CS value (MSR SYSENTER_CS+24). The CPLis forced to 3, as are the descriptor privilege levels.The hidden portions of the CS and SS segment registers are not loaded from thedescriptor table as they would be using a legacy x86 RET instruction. Instead, thehidden portions are forced by the processor to the following values:• The CS and SS base values are forced to 0.• The CS and SS limit values are forced to 4 Gbytes.• The CS segment attributes are set to 32-bit read/execute at CPL 3.• The SS segment attributes are set to read/write and expand-up with a 32-bit stackreferenced by ESP.System software must create corresponding descriptor-table entries referenced by thenew CS and SS selectors that match the values described above.The following additional actions result from executing SYSEXIT:• EIP is loaded from EDX.• ESP is loaded from ECX.System software must explicitly load the return address and application softwarestackpointer into the EDX and ECX registers prior to executing SYSEXIT.For additional information on this instruction, see “SYSENTER and SYSEXIT(Legacy Mode Only)” in Volume 2.SYSEXIT 361
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24594 Rev. 3.10 February 2005 AMD64 TechnologySYSEXIT<strong>System</strong> ReturnReturns from the operating system to an application. It is a low-latency system returninstruction designed for use by system <strong>and</strong> application software implementing a flatsegmentmemory model.This is a privileged instruction. The current privilege level must be zero to executethis instruction. An invalid-opcode exception occurs if this instruction is used in longmode. Software should use the SYSRET (<strong>and</strong> SYSCALL) instructions when running inlong mode.When a system procedure performs a SYSEXIT back to application software, the CSselector is updated to point to the second descriptor entry after the SYSENTER CSvalue (MSR SYSENTER_CS+16). The SS selector is updated to point to the thirddescriptor entry after the SYSENTER CS value (MSR SYSENTER_CS+24). The CPLis forced to 3, as are the descriptor privilege levels.The hidden portions of the CS <strong>and</strong> SS segment registers are not loaded from thedescriptor table as they would be using a legacy x86 RET instruction. Instead, thehidden portions are forced by the processor to the following values:• The CS <strong>and</strong> SS base values are forced to 0.• The CS <strong>and</strong> SS limit values are forced to 4 Gbytes.• The CS segment attributes are set to 32-bit read/execute at CPL 3.• The SS segment attributes are set to read/write <strong>and</strong> exp<strong>and</strong>-up with a 32-bit stackreferenced by ESP.<strong>System</strong> software must create corresponding descriptor-table entries referenced by thenew CS <strong>and</strong> SS selectors that match the values described above.The following additional actions result from executing SYSEXIT:• EIP is loaded from EDX.• ESP is loaded from ECX.<strong>System</strong> software must explicitly load the return address <strong>and</strong> application softwarestackpointer into the EDX <strong>and</strong> ECX registers prior to executing SYSEXIT.For additional information on this instruction, see “SYSENTER <strong>and</strong> SYSEXIT(Legacy Mode Only)” in <strong>Volume</strong> 2.SYSEXIT 361
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