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AMD64 Technology 24594 Rev. 3.10 February 2005ExceptionsException RealVirtual8086 Protected Cause of ExceptionInvalid opcode, #UD X X This instruction is only recognized in protected mode.Segment not present,X The TSS descriptor was marked not present.#NP (selector)Stack, #SS X A memory address exceeded the stack segment limit or was noncanonical.General protection, #GPX A memory address exceeded a data segment limit or was noncanonical.General protection, #GP(selector)XXXXXXXCPL was not 0.A null data segment was used to reference memory.The new TSS selector was a null selector.The source selector did not point into the GDT.The descriptor was beyond the GDT limit.The descriptor was not an available TSS descriptor.The descriptor's extended attribute bits were not zero in 64-bitmode.X The new TSS base address was non-canonical.Page fault, #PF X A page fault resulted from the execution of the instruction.328 LTR
24594 Rev. 3.10 February 2005 AMD64 TechnologyMOV(CRn)Move to/from Control RegistersMoves the contents of a 32-bit or 64-bit general-purpose register to a control registeror vice versa.In 64-bit mode, the operand size is fixed at 64 bits without the need for a REX prefix.In non-64-bit mode, the operand size is fixed at 32 bits and the upper 32 bits of thedestination are forced to 0.CR0 maintains the state of various control bits. CR2 and CR3 are used for pagetranslation. CR4 holds various feature enable bits. CR8 is used to prioritize externalinterrupts. CR1, CR5, CR6, CR7, and CR9 through CR15 are all reserved and raise anundefined opcode exception (#UD) if referenced.CR8 can also be read and modified using the task priority register described in“System-Control Registers” in Volume 2.CR8 can be read and written in 64-bit mode, using a REX prefix. CR8 can be read andwritten in legacy mode using the MOV (CRn) opcode, using a LOCK prefix instead of aREX prefix to specify the additional opcode bit. To verify whether the LOCK prefixcan be used in this way, check the status of ECX bit 4 returned by CPUID standardfunction 80000001h.This instruction is always treated as a register-to-register (MOD = 11) instruction,regardless of the encoding of the MOD field in the MODR/M byte.MOV(CRn) is a privileged instruction and must always be executed at CPL = 0.MOV (CRn) is a serializing instruction.Mnemonic Opcode DescriptionMOV CRn, reg32 0F 22 /r Move the contents of a 32-bit register to CRnMOV CRn, reg64 0F 22 /r Move the contents of a 64-bit register to CRnMOV reg32,CRn 0F 20 /r Move the contents of CRn to a 32-bit register.MOV reg64,CRn 0F 20 /r Move the contents of CRn to a 64-bit register.Note:CR0, CR2, CR3, CR4, and CR8 are the only registers to which this instruction applies. See text for details.MOV(CRn) 329
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