Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005• Repeat Prefixes—These prefixes affect only certain stringinstructions. When used with 128-bit and 64-bit mediainstructions, these prefixes act in a special way to modify theopcode.Table 1-1.Legacy Instruction PrefixesPrefix Group 1MnemonicPrefix Byte(Hex)DescriptionOperand-Size Override none 66 2 Changes the default operand size of a memory or registeroperand, as shown in Table 1-2 on page 5.Address-Size Override none 67 3 Changes the default address size of a memory operand, asshown in Table 1-3 on page 7.CS 2E 4 Forces use of the current CS segment for memory operands.DS 3E 4 Forces use of the current DS segment for memory operands.Segment OverrideES 26 4 Forces use of the current ES segment for memory operands.FS 64 Forces use of the current FS segment for memory operands.GS 65 Forces use of the current GS segment for memory operands.SS 36 4 Forces use of the current SS segment for memory operands.Lock LOCK F0 5 Causes certain kinds of memory read-modify-writeinstructions to occur atomically.RepeatREPREPE orREPZF3 6Repeats a string operation (INS, MOVS, OUTS, LODS, andSTOS) until the rCX register equals 0.Repeats a compare-string or scan-string operation(CMPSx and SCASx) until the rCX register equals 0 or thezero flag (ZF) is cleared to 0.REPNE orREPNZF2 6Repeats a compare-string or scan-string operation(CMPSx and SCASx) until the rCX register equals 0 or thezero flag (ZF) is set to 1.Note:1. A single instruction should include a maximum of one prefix from each of the five groups.2. When used with 128-bit and 64-bit media instructions, this prefix acts in a special way to modify the opcode. The prefix is ignoredby 64-bit media floating-point (3DNow!) instructions. See “Instructions that Cannot Use the Operand-Size Prefix” on page 6.3. This prefix also changes the size of the RCX register when used as an implied count register.4. In 64-bit mode, the CS, DS, ES, and SS segment overrides are ignored.5. The LOCK prefix should not be used for instructions other than those listed in “Lock Prefix” on page 10.6. This prefix should be used only with compare-string and scan-string instructions. When used with 128-bit and 64-bit media instructions,the prefix acts in a special way to modify the opcode.4 Chapter 1: Instruction Formats
24594 Rev. 3.10 February 2005 AMD64 Technology1.2.2 Operand-SizeOverride PrefixThe default operand size for an instruction is determined by acombination of its opcode, the D (default) bit in the currentcode-segment descriptor, and the current operating mode, asshown in Table 1-2. The operand-size override prefix (66h)selects the non-default operand size. The prefix can be usedwith any general-purpose instruction that accesses non-fixedsizeoperands in memory or general-purpose registers (GPRs),and it can also be used with the x87 FLDENV, FNSTENV,FNSAVE, and FRSTOR instructions.In 64-bit mode, the prefix allows mixing of 16-bit, 32-bit, and 64-bit data on an instruction-by-instruction basis. In compatibilityand legacy modes, the prefix allows mixing of 16-bit and 32-bitoperands on an instruction-by-instruction basis.Table 1-2.Operand-Size OverridesLongModeOperating Mode64-BitModeCompatibilityModeLegacy Mode(Protected, Virtual-8086,or Real Mode)DefaultOperandSize (Bits)EffectiveOperandSize(Bits)Instruction Prefix 166h REX.W 332 2 32 no no64 don’t care yes3216321616 yes no32 no16 yes32 yes16 no32 no16 yes32 yes16 noNotApplicableNote:1. A “no’ indicates that the default operand size is used.2. This is the typical default, although some instructions default to other operand sizes. SeeAppendix B, “General-Purpose Instructions in 64-Bit Mode,” for details.3. See “REX Prefixes” on page 14.Chapter 1: Instruction Formats 5
- Page 2 and 3: © 2002, 2003, 2004, 2005 Advanced
- Page 4 and 5: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 6 and 7: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 8: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 12 and 13: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 14 and 15: AMD64 Technology 24594—Rev. 3.10
- Page 16 and 17: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 18 and 19: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 20 and 21: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 22 and 23: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 24 and 25: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 26 and 27: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 28 and 29: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 30 and 31: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 32 and 33: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 36 and 37: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 38 and 39: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 40 and 41: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 42 and 43: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 44 and 45: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 46 and 47: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 48 and 49: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 50 and 51: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 52 and 53: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 54 and 55: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 56 and 57: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 58 and 59: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 60 and 61: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 62 and 63: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 64 and 65: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 66 and 67: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 68 and 69: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 70 and 71: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 72 and 73: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 74 and 75: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 76 and 77: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 78 and 79: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 80 and 81: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 82 and 83: AMD64 Technology 24594 Rev. 3.10 Fe
24594 Rev. 3.10 February 2005 AMD64 Technology1.2.2 Oper<strong>and</strong>-SizeOverride PrefixThe default oper<strong>and</strong> size for an instruction is determined by acombination of its opcode, the D (default) bit in the currentcode-segment descriptor, <strong>and</strong> the current operating mode, asshown in Table 1-2. The oper<strong>and</strong>-size override prefix (66h)selects the non-default oper<strong>and</strong> size. The prefix can be usedwith any general-purpose instruction that accesses non-fixedsizeoper<strong>and</strong>s in memory or general-purpose registers (GPRs),<strong>and</strong> it can also be used with the x87 FLDENV, FNSTENV,FNSAVE, <strong>and</strong> FRSTOR instructions.In 64-bit mode, the prefix allows mixing of 16-bit, 32-bit, <strong>and</strong> 64-bit data on an instruction-by-instruction basis. In compatibility<strong>and</strong> legacy modes, the prefix allows mixing of 16-bit <strong>and</strong> 32-bitoper<strong>and</strong>s on an instruction-by-instruction basis.Table 1-2.Oper<strong>and</strong>-Size OverridesLongModeOperating Mode64-BitModeCompatibilityModeLegacy Mode(Protected, Virtual-8086,or Real Mode)DefaultOper<strong>and</strong>Size (Bits)EffectiveOper<strong>and</strong>Size(Bits)Instruction Prefix 166h REX.W 332 2 32 no no64 don’t care yes3216321616 yes no32 no16 yes32 yes16 no32 no16 yes32 yes16 noNotApplicableNote:1. A “no’ indicates that the default oper<strong>and</strong> size is used.2. This is the typical default, although some instructions default to other oper<strong>and</strong> sizes. SeeAppendix B, “<strong>General</strong>-<strong>Purpose</strong> <strong>Instructions</strong> in 64-Bit Mode,” for details.3. See “REX Prefixes” on page 14.Chapter 1: Instruction Formats 5