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AMD64 Technology 24594 Rev. 3.10 February 2005ExceptionGeneral protection,#GPRealXVirtual8086 Protected Cause of ExceptionXThe target offset exceeded the code segment limit or was noncanonical.XIOPL was less than 3 and one of the following conditions was true:• CR4.VME was 0.• The effective operand size was 32-bit.• Both the original EFLAGS.VIP and the new EFLAGS.IF were set.• The new EFLAGS.TF was set.General protection,#GP(selector)XXXXXXXXXXXIRETx was executed in long mode while EFLAGS.NT=1.The return code selector was a null selector.The return stack selector was a null selector and the return mode wasnon-64-bit mode or CPL was 3.The return code or stack descriptor exceeded the descriptor tablelimit.The return code or stack selector’s TI bit was set but the LDT selectorwas a null selector.The segment descriptor for the return code was not a code segment.The RPL of the return code segment selector was less than the CPL.The return code segment was non-conforming and the segmentselector’s DPL was not equal to the RPL of the code segment’ssegment selector.The return code segment was conforming and the segment selector’sDPL was greater than the RPL of the code segment’s segment selectorThe segment descriptor for the return stack was not a writable datasegment.The stack segment descriptor DPL was not equal to the RPL of thereturn code segment selector.X The stack segment selector RPL was not equal to the RPL of the returncode segment selector.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.314 IRETx
24594 Rev. 3.10 February 2005 AMD64 TechnologyLARLoad Access Rights ByteLoads the access rights from the segment descriptor specified by a 16-bit sourceregister or memory operand into a specified 16-bit, 32-bit, or 64-bit general-purposeregister and sets the zero (ZF) flag in the rFLAGS register if successful. LAR clearsthe zero flag if the descriptor is invalid for any reason.The LAR instruction checks that:• the segment selector is not a null selector.• the descriptor is within the GDT or LDT limit.• the descriptor DPL is greater than or equal to both the CPL and RPL, or the segmentis a conforming code segment.• the descriptor type is valid for the LAR instruction. Valid descriptor types areshown in the following table. LDT and TSS descriptors in 64-bit mode, and callgatedescriptors in long mode, are only valid if bits 12–8 of doubleword +12 arezero, as shown on page 111 of vol. 2 in Figure 4-22.Valid Descriptor TypeDescriptionLegacy ModeLong Mode— — All code and data descriptors1 — Available 16-bit TSS2 2 LDT3 — Busy 16-bit TSS4 — 16-bit call gate5 — Task gate9 9 Available 32-bit or 64-bit TSSB B Busy 32-bit or 64-bit TSSC C 32-bit or 64-bit call gateIf the segment descriptor passes these checks, the attributes are loaded into thedestination general-purpose register. If it does not, then the zero flag is cleared andthe destination register is not modified.When the operand size is 16 bits, access rights include the DPL and Type fields locatedin bytes 4 and 5 of the descriptor table entry. Before loading the access rights into thedestination operand, the low order word is masked with FF00H.LAR 315
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