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AMD64 Technology 24594 Rev. 3.10 February 2005£ 15 BytesMost-signifcant(highest) addressLeast-signifcant(lowest) address7 0Immediate *Immediate *Immediate *ImmediateDisplacement**Displacement *Displacement *DisplacementSIB**ModRM *Opcode *Opcode (all two-byte opcodes have 0Fh as their first byte)REX Prefix + (available only in 64-bit mode)Legacy PrefixLegacy Prefix++Legacy Prefix +* optional, depending on the instructionLegacy Prefix ++ optional, with most instructions513-304.epsFigure 1-2.Little-Endian Byte-Order of Instruction Stored in MemoryThe basic operation of an instruction is specified by an opcode.The opcode is one or two bytes long, as described in “Opcode”on page 20. An opcode can be preceded by any number of legacyprefixes. These prefixes can be classified as belonging to any ofthe five groups of prefixes described in “Instruction Prefixes”on page 3. The legacy prefixes modify an instruction’s defaultaddress size, operand size, or segment, or they invoke a specialfunction such as modification of the opcode, atomic buslocking,or repetition. The REX prefix can be used in 64-bitmode to access the register extensions illustrated in“Application-Programming Register Set” in Volume 1. If a REXprefix is used, it must immediately precede the first opcodebyte.An instruction’s opcode consists of one or two bytes. In several128-bit and 64-bit media instructions, a legacy operand-size orrepeat prefix byte is used in a special-purpose way to modifythe opcode. The opcode can be followed by a mode-registermemory(ModRM) byte, which further describes the operation2 Chapter 1: Instruction Formats
24594 Rev. 3.10 February 2005 AMD64 Technologyand/or operands. The opcode, or the opcode and ModRM byte,can also be followed by a scale-index-base (SIB) byte, whichdescribes the scale, index, and base forms of memoryaddressing. The ModRM and SIB bytes are described in“ModRM and SIB Bytes” on page 20, but their legacy functionscan be modified by the REX prefix (“Instruction Prefixes” onpage 3).The 15-byte instruction-length limit can only be exceeded byusing redundant prefixes. If the limit is exceeded, a generalprotectionexception occurs.1.2 Instruction PrefixesThe instruction prefixes shown in Figure 1-1 on page 1 are oftwo types: legacy prefixes and REX prefixes. Each of the legacyprefixes has a unique byte value. By contrast, the REX prefixes,which enable use of the AMD64 register extensions in 64-bitmode, are organized as a group of byte values in which the valueof the prefix indicates the combination of register-extensionfeatures to be enabled.1.2.1 Summary ofLegacy PrefixesTable 1-1 on page 4 shows the legacy prefixes—that is, allprefixes except the REX prefixes, which are described onpage 14. The legacy prefixes are organized into five groups, asshown in the left-most column of Table 1-1. A single instructionshould include a maximum of one prefix from each of the fivegroups. The legacy prefixes can appear in any order within theposition shown in Figure 1-1 for legacy prefixes. The result ofusing multiple prefixes from a single group is unpredictable.Some of the restrictions on legacy prefixes are:• Operand-Size Override—This prefix affects only generalpurposeinstructions and a few x87 instructions. When usedwith 128-bit and 64-bit media instructions, this prefix acts ina special way to modify the opcode.• Address-Size Override—This prefix affects only memoryoperands.• Segment Override—In 64-bit mode, the CS, DS, ES, and SSsegment override prefixes are ignored.• LOCK Prefix—This prefix is allowed only with certaininstructions that modify memory.Chapter 1: Instruction Formats 3
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