Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005RETF_REAL_OR_VIRTUAL:IF (OPCODE = retf imm16)temp_IMM = word-sized immediate specified in the instruction,zero-extended to 64 bitsELSE // (OPCODE = retf)temp_IMM = 0POP.v temp_RIPPOP.v temp_CSIF (temp_RIP > CS.limit)EXCEPTION [#GP(0)]CS.sel = temp_CSCS.base = temp_CS SHL 4RSP.s = RSP + temp_IMMRIP = temp_RIPEXITRETF_PROTECTED:IF (OPCODE = retf imm16)temp_IMM = word-sized immediate specified in the instruction,zero-extended to 64 bitsELSE // (OPCODE = retf)temp_IMM = 0POP.v temp_RIPPOP.v temp_CStemp_CPL = temp_CS.rplIF (CPL=temp_CPL){CS = READ_DESCRIPTOR (temp_CS, iret_chk)RSP.s = RSP + temp_IMMIF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit))EXCEPTION [#GP(0)]RIP = temp_RIPEXIT}ELSE // (CPL!=temp_CPL)248 RET (Far)
24594 Rev. 3.10 February 2005 AMD64 Technology{RSP.s = RSP + temp_IMMPOP.v temp_RSPPOP.v temp_SSCS = READ_DESCRIPTOR (temp_CS, iret_chk)CPL = temp_CPLIF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit))EXCEPTION [#GP(0)]SS = READ_DESCRIPTOR (temp_SS, ss_chk)RSP.s = temp_RSP + temp_IMMIF (changing CPL){FOR (seg = ES, DS, FS, GS)IF ((seg.attr.dpl < CPL) && ((seg.attr.type = ’data’)|| (seg.attr.type = ’non-conforming-code’))){seg = NULL // can’t use lower dpl data segment at higher cpl}}}RIP = temp_RIPEXITRelated InstructionsCALL (Near), CALL (Far), RET (Near)rFLAGS AffectedNoneExceptionsExceptionSegment not present,#NP (selector)RealVirtual8086 Protected Cause of ExceptionXThe return code segment was marked not present.Stack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.Stack, #SS (selector) X The return stack segment was marked not present.RET (Far) 249
- Page 228 and 229: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 230 and 231: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 232 and 233: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 234 and 235: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 236 and 237: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 238 and 239: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 240 and 241: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 242 and 243: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 244 and 245: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 246 and 247: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 248 and 249: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 250 and 251: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 252 and 253: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 254 and 255: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 256 and 257: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 258 and 259: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 260 and 261: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 262 and 263: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 264 and 265: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 266 and 267: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 268 and 269: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 270 and 271: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 272 and 273: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 274 and 275: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 276 and 277: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 280 and 281: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 282 and 283: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 284 and 285: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 286 and 287: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 288 and 289: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 290 and 291: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 292 and 293: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 294 and 295: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 296 and 297: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 298 and 299: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 300 and 301: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 302 and 303: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 304 and 305: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 306 and 307: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 308 and 309: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 310 and 311: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 312 and 313: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 314 and 315: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 316 and 317: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 318 and 319: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 320 and 321: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 322 and 323: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 324 and 325: AMD64 Technology 24594 Rev. 3.10 Fe
- Page 326 and 327: AMD64 Technology 24594 Rev. 3.10 Fe
AMD64 Technology 24594 Rev. 3.10 February 2005RETF_REAL_OR_VIRTUAL:IF (OPCODE = retf imm16)temp_IMM = word-sized immediate specified in the instruction,zero-extended to 64 bitsELSE // (OPCODE = retf)temp_IMM = 0POP.v temp_RIPPOP.v temp_CSIF (temp_RIP > CS.limit)EXCEPTION [#GP(0)]CS.sel = temp_CSCS.base = temp_CS SHL 4RSP.s = RSP + temp_IMMRIP = temp_RIPEXITRETF_PROTECTED:IF (OPCODE = retf imm16)temp_IMM = word-sized immediate specified in the instruction,zero-extended to 64 bitsELSE // (OPCODE = retf)temp_IMM = 0POP.v temp_RIPPOP.v temp_CStemp_CPL = temp_CS.rplIF (CPL=temp_CPL){CS = READ_DESCRIPTOR (temp_CS, iret_chk)RSP.s = RSP + temp_IMMIF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit))EXCEPTION [#GP(0)]RIP = temp_RIPEXIT}ELSE // (CPL!=temp_CPL)248 RET (Far)
Change language