Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005PUSHAxPUSHADPush All GPRs onto StackPushes the contents of the eAX, eCX, eDX, eBX, eSP (original value), eBP, eSI, andeDI general-purpose registers onto the stack in that order. This instruction decrementsthe stack pointer by 16 or 32 depending on operand size.Using the PUSHA or PUSHAD instruction in 64-bit mode generates an invalid-opcodeexception.Mnemonic Opcode DescriptionPUSHA 60PUSHAD 60Push the contents of the AX, CX, DX, BX, original SP, BP, SI, andDI registers onto the stack.(Invalid in 64-bit mode.)Push the contents of the EAX, ECX, EDX, EBX, original ESP, EBP,ESI, and EDI registers onto the stack.(Invalid in 64-bit mode.)Related InstructionsPOPA, POPADrFLAGS AffectedNoneExceptionsException RealVirtual8086 Protected Cause of ExceptionInvalid opcode, #UD X This instruction was executed in 64-bit mode.Stack, #SS X X X A memory address exceeded the stack segment limit.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.236 PUSHAx
24594 Rev. 3.10 February 2005 AMD64 TechnologyPUSHFxPUSHFDPUSHFQPush rFLAGS onto StackDecrements the rSP register and copies the rFLAGS register (except for the VM andRF flags) onto the stack. The instruction clears the VM and RF flags in the rFLAGSimage before putting it on the stack.The instruction pushes 2, 4, or 8 bytes, depending on the operand size.In 64-bit mode, this instruction defaults to a 64-bit operand size and there is no prefixavailable to encode a 32-bit operand size.In virtual-8086 mode, if system software has set the IOPL field to a value less than 3, ageneral-protection exception occurs if application software attempts to executePUSHFx or POPFx while VME is not enabled or the operand size is not 16-bit.Mnemonic Opcode DescriptionPUSHF 9C Push the FLAGS word onto the stack.PUSHFDAction// See “Pseudocode Definitions” on page 49.PUSHF_START:IF (REAL_MODE)PUSHF_REALELSIF (PROTECTED_MODE)PUSHF_PROTECTEDELSE // (VIRTUAL_MODE)PUSHF_VIRTUAL9CPush the EFLAGS doubleword onto stack. (No prefix encodingthis in 64-bit mode.)PUSHFQ 9C Push the RFLAGS quadword onto stack.PUSHF_REAL:PUSH.v old_RFLAGSEXITPUSHF_PROTECTED:PUSH.v old_RFLAGSEXIT// Pushed with RF and VM cleared.// Pushed with RF cleared.PUSHFx 237
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AMD64 Technology 24594 Rev. 3.10 February 2005PUSHAxPUSHADPush All GPRs onto StackPushes the contents of the eAX, eCX, eDX, eBX, eSP (original value), eBP, eSI, <strong>and</strong>eDI general-purpose registers onto the stack in that order. This instruction decrementsthe stack pointer by 16 or 32 depending on oper<strong>and</strong> size.Using the PUSHA or PUSHAD instruction in 64-bit mode generates an invalid-opcodeexception.Mnemonic Opcode DescriptionPUSHA 60PUSHAD 60Push the contents of the AX, CX, DX, BX, original SP, BP, SI, <strong>and</strong>DI registers onto the stack.(Invalid in 64-bit mode.)Push the contents of the EAX, ECX, EDX, EBX, original ESP, EBP,ESI, <strong>and</strong> EDI registers onto the stack.(Invalid in 64-bit mode.)Related <strong>Instructions</strong>POPA, POPADrFLAGS AffectedNoneExceptionsException RealVirtual8086 Protected Cause of ExceptionInvalid opcode, #UD X This instruction was executed in 64-bit mode.Stack, #SS X X X A memory address exceeded the stack segment limit.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.236 PUSHAx
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