Volume 3: General-Purpose and System Instructions - Stanford ...
Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...
AMD64 Technology 24594 Rev. 3.10 February 2005sticky bitA bit that is set or cleared by hardware and that remains inthat state until explicitly changed by software.TOPThe x87 top-of-stack pointer.TPRTask-priority register (CR8).TSSTask-state segment.underflowThe condition in which a floating-point number is smaller inmagnitude than the smallest nonzero, positive or negativenumber that can be represented in the data-type formatbeing used.vector(1) A set of integer or floating-point values, called elements,that are packed into a single operand. Most of the 128-bitand 64-bit media instructions use vectors as operands.Vectors are also called packed or SIMD (single-instructionmultiple-data) operands.(2) An index into an interrupt descriptor table (IDT), used toaccess exception handlers. Compare exception.virtual-8086 modeA submode of legacy mode.wordTwo bytes, or 16 bits.x86See legacy x86.RegistersIn the following list of registers, the names are used to refereither to a given register or to the contents of that register:AH–DHThe high 8-bit AH, BH, CH, and DH registers. CompareAL–DL.xxivPreface
24594 Rev. 3.10 February 2005 AMD64 TechnologyAL–DLThe low 8-bit AL, BL, CL, and DL registers. Compare AH–DH.AL–r15BThe low 8-bit AL, BL, CL, DL, SIL, DIL, BPL, SPL, andR8B–R15B registers, available in 64-bit mode.BPBase pointer register.CRnControl register number n.CSCode segment register.eAX–eSPThe 16-bit AX, BX, CX, DX, DI, SI, BP, and SP registers or the32-bit EAX, EBX, ECX, EDX, EDI, ESI, EBP, and ESPregisters. Compare rAX–rSP.EFERExtended features enable register.eFLAGS16-bit or 32-bit flags register. Compare rFLAGS.EFLAGS32-bit (extended) flags register.eIP16-bit or 32-bit instruction-pointer register. Compare rIP.EIP32-bit (extended) instruction-pointer register.FLAGS16-bit flags register.GDTRGlobal descriptor table register.GPRsGeneral-purpose registers. For the 16-bit data size, these areAX, BX, CX, DX, DI, SI, BP, and SP. For the 32-bit data size,these are EAX, EBX, ECX, EDX, EDI, ESI, EBP, and ESP. ForPrefacexxv
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24594 Rev. 3.10 February 2005 AMD64 TechnologyAL–DLThe low 8-bit AL, BL, CL, <strong>and</strong> DL registers. Compare AH–DH.AL–r15BThe low 8-bit AL, BL, CL, DL, SIL, DIL, BPL, SPL, <strong>and</strong>R8B–R15B registers, available in 64-bit mode.BPBase pointer register.CRnControl register number n.CSCode segment register.eAX–eSPThe 16-bit AX, BX, CX, DX, DI, SI, BP, <strong>and</strong> SP registers or the32-bit EAX, EBX, ECX, EDX, EDI, ESI, EBP, <strong>and</strong> ESPregisters. Compare rAX–rSP.EFERExtended features enable register.eFLAGS16-bit or 32-bit flags register. Compare rFLAGS.EFLAGS32-bit (extended) flags register.eIP16-bit or 32-bit instruction-pointer register. Compare rIP.EIP32-bit (extended) instruction-pointer register.FLAGS16-bit flags register.GDTRGlobal descriptor table register.GPRs<strong>General</strong>-purpose registers. For the 16-bit data size, these areAX, BX, CX, DX, DI, SI, BP, <strong>and</strong> SP. For the 32-bit data size,these are EAX, EBX, ECX, EDX, EDI, ESI, EBP, <strong>and</strong> ESP. ForPrefacexxv
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