Volume 3: General-Purpose and System Instructions - Stanford ...

Volume 3: General-Purpose and System Instructions - Stanford ... Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005rFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptions0 M M U M 021 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, and 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.General protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.XThe destination operand was in a non-writable segment.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.218 OR

24594 Rev. 3.10 February 2005 AMD64 TechnologyOUTOutput to PortCopies the value from the AL, AX, or EAX register (second operand) to an I/O port(first operand). The port address can be a byte-immediate value (00h to FFh) or thevalue in the DX register (0000h to FFFFh). The source register used determines thesize of the port (8, 16, or 32 bits).If the operand size is 64 bits, OUT only writes to a 32-bit I/O port.If the CPL is higher than the IOPL or the mode is virtual mode, OUT checks the I/Opermission bitmap in the TSS before allowing access to the I/O port. See Volume 2 fordetails on the TSS I/O permission bitmap.Mnemonic Opcode DescriptionOUT imm8, ALOUT imm8, AXOUT imm8, EAXRelated InstructionsIN, INSx, OUTSxrFLAGS AffectedNoneE6 ibE7 ibE7 ibOutput the byte in the AL register to the port specified by an 8-bitimmediate value.Output the word in the AX register to the port specified by an 8-bit immediate value.Output the doubleword in the EAX register to the port specifiedby an 8-bit immediate value.OUT DX, AL EE Output byte in AL to the output port specified in DX.OUT DX, AX EF Output word in AX to the output port specified in DX.OUT DX, EAX EF Output doubleword in EAX to the output port specified in DX.OUT 219

24594 Rev. 3.10 February 2005 AMD64 TechnologyOUTOutput to PortCopies the value from the AL, AX, or EAX register (second oper<strong>and</strong>) to an I/O port(first oper<strong>and</strong>). The port address can be a byte-immediate value (00h to FFh) or thevalue in the DX register (0000h to FFFFh). The source register used determines thesize of the port (8, 16, or 32 bits).If the oper<strong>and</strong> size is 64 bits, OUT only writes to a 32-bit I/O port.If the CPL is higher than the IOPL or the mode is virtual mode, OUT checks the I/Opermission bitmap in the TSS before allowing access to the I/O port. See <strong>Volume</strong> 2 fordetails on the TSS I/O permission bitmap.Mnemonic Opcode DescriptionOUT imm8, ALOUT imm8, AXOUT imm8, EAXRelated <strong>Instructions</strong>IN, INSx, OUTSxrFLAGS AffectedNoneE6 ibE7 ibE7 ibOutput the byte in the AL register to the port specified by an 8-bitimmediate value.Output the word in the AX register to the port specified by an 8-bit immediate value.Output the doubleword in the EAX register to the port specifiedby an 8-bit immediate value.OUT DX, AL EE Output byte in AL to the output port specified in DX.OUT DX, AX EF Output word in AX to the output port specified in DX.OUT DX, EAX EF Output doubleword in EAX to the output port specified in DX.OUT 219

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